[PATCH] ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151
Alexandre TORGUE
alexandre.torgue at foss.st.com
Tue Dec 10 00:15:59 PST 2024
Hi Arnaud
On 12/6/24 18:17, Arnaud Pouliquen wrote:
> The GIC IRQ type used for IPCC RX should be IRQ_TYPE_LEVEL_HIGH.
> Replacing the interrupt with the EXTI event changes the type to
> the numeric value 1, meaning IRQ_TYPE_EDGE_RISING.
>
> The issue is that EXTI event 61 is a direct event.The IRQ type of
> direct events is not used by EXTI and is propagated to the parent
> IRQ controller of EXTI, the GIC.
>
> Align the IRQ type to the value expected by the GIC by replacing
> the second parameter "1" with IRQ_TYPE_LEVEL_HIGH.
>
> Fixes: 7d9802bb0e34 ("ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151")
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen at foss.st.com>
> ---
> arch/arm/boot/dts/st/stm32mp151.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
> index b28dc90926bd..e7e3ce8066ec 100644
> --- a/arch/arm/boot/dts/st/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
> @@ -129,7 +129,7 @@ ipcc: mailbox at 4c001000 {
> reg = <0x4c001000 0x400>;
> st,proc-id = <0>;
> interrupts-extended =
> - <&exti 61 1>,
> + <&exti 61 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "rx", "tx";
> clocks = <&rcc IPCC>;
Applied on stm32-next.
Alex
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