[PATCH] arm64: dts: fvp: Update bus-range property

[Sudeep Holla]

On Wed, Dec 04, 2024 at 07:40:09PM +0000, Liviu Dudau wrote:
> On Thu, Nov 28, 2024 at 08:55:43PM +0530, Aneesh Kumar K.V (Arm) wrote:
> > These days, the Fixed Virtual Platforms(FVP) Base RevC model supports
> > more PCI devices. Update the max bus number so that Linux can enumerate
> > them correctly. Without this, the kernel throws the below error while
> > booting with the default hierarchy
> > 
> > pci_bus 0000:01: busn_res: [bus 01] end is updated to 01
> > pci_bus 0000:02: busn_res: can not insert [bus 02-01] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02
> > pci_bus 0000:02: busn_res: can not insert [bus 02] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci_bus 0000:03: busn_res: can not insert [bus 03-01] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci_bus 0000:03: busn_res: [bus 03-01] end is updated to 03
> > pci_bus 0000:03: busn_res: can not insert [bus 03] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci_bus 0000:04: busn_res: can not insert [bus 04-01] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci_bus 0000:04: busn_res: [bus 04-01] end is updated to 04
> > pci_bus 0000:04: busn_res: can not insert [bus 04] under [bus 00-01] (conflicts with (null) [bus 00-01])
> > pci 0000:00:01.0: BAR 14: assigned [mem 0x50000000-0x500fffff]
> > 
> > The change is using 0xff as max bus nr because the ECAM window is 256MB in size.
> > 
> > pci-host-generic 40000000.pci: ECAM at [mem 0x40000000-0x4fffffff] for [bus 00-01]
> > 
> > lspci output with and without the change
> > without fix:
> > 00:00.0 Host bridge: ARM Device 00ba (rev 01)
> > 00:01.0 PCI bridge: ARM Device 0def
> > 00:02.0 PCI bridge: ARM Device 0def
> > 00:03.0 PCI bridge: ARM Device 0def
> > 00:04.0 PCI bridge: ARM Device 0def
> > 00:1e.0 Unassigned class [ff00]: ARM Device ff80
> > 00:1e.1 Unassigned class [ff00]: ARM Device ff80
> > 00:1f.0 SATA controller: Device 0abc:aced (rev 01)
> > 01:00.0 SATA controller: Device 0abc:aced (rev 01)
> > 
> > with fix:
> > 00:00.0 Host bridge: ARM Device 00ba (rev 01)
> > 00:01.0 PCI bridge: ARM Device 0def
> > 00:02.0 PCI bridge: ARM Device 0def
> > 00:03.0 PCI bridge: ARM Device 0def
> > 00:04.0 PCI bridge: ARM Device 0def
> > 00:1e.0 Unassigned class [ff00]: ARM Device ff80
> > 00:1e.1 Unassigned class [ff00]: ARM Device ff80
> > 00:1f.0 SATA controller: Device 0abc:aced (rev 01)
> > 01:00.0 SATA controller: Device 0abc:aced (rev 01)
> > 02:00.0 Unassigned class [ff00]: ARM Device ff80
> > 02:00.4 Unassigned class [ff00]: ARM Device ff80
> > 03:00.0 PCI bridge: ARM Device 0def
> > 04:00.0 PCI bridge: ARM Device 0def
> > 04:01.0 PCI bridge: ARM Device 0def
> > 04:02.0 PCI bridge: ARM Device 0def
> > 05:00.0 SATA controller: Device 0abc:aced (rev 01)
> > 06:00.0 Unassigned class [ff00]: ARM Device ff80
> > 06:00.7 Unassigned class [ff00]: ARM Device ff80
> > 07:00.0 Unassigned class [ff00]: ARM Device ff80
> > 07:00.3 Unassigned class [ff00]: ARM Device ff80
> > 08:00.0 Unassigned class [ff00]: ARM Device ff80
> > 08:00.1 Unassigned class [ff00]: ARM Device ff80
> > 
> > Cc: Liviu Dudau <liviu.dudau at arm.com>
> > Cc: Sudeep Holla <sudeep.holla at arm.com>
> > Cc: Lorenzo Pieralisi <lpieralisi at kernel.org>
> > Cc: Rob Herring <robh at kernel.org>
> > Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> > Cc: Conor Dooley <conor+dt at kernel.org>
> > Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar at kernel.org>
> 
> Reviewed-by: Liviu Dudau <liviu.dudau at arm.com>
> 
> Sudeep, can you please take this patch through your tree?
>

I have already queued and must be in -next, just didn't get to a point to
respond as applied yet. I will update with your tags. Thanks!

-- 
Regards,
Sudeep