[PATCH v4 1/2] arm64: dts: ti: k3-j722s-main: Add R5F and C7x remote processor nodes

[Andrew Davis]

On 8/29/24 1:09 AM, Beleswar Padhi wrote:
> From: Apurva Nandan <a-nandan at ti.com>
> 
> The K3 J722S SoCs have one single-core Arm Cortex-R5F processor in each
> of the WAKEUP, MCU and MAIN voltage domain, and two C71x DSP subsystems
> in MAIN voltage domain. Add the DT nodes to support Inter-Processor
> Communication.
> 
> Signed-off-by: Apurva Nandan <a-nandan at ti.com>
> [ refactoring changes to k3-j722s-main.dtsi ]
> Signed-off-by: Beleswar Padhi <b-padhi at ti.com>
> ---

Reviewed-by: Andrew Davis <afd at ti.com>

> v4: Changelog:
> 1) Put standard properties (resets, firmware-name) before vendor
> specific properties in added DT Nodes. (Nishanth)
> 
> Link to v3:
> https://lore.kernel.org/all/20240828112713.2668526-2-b-padhi@ti.com/
> 
> v3: Changelog:
> 1) None to this patch.
> 
> Link to v2:
> https://lore.kernel.org/all/20240612112259.1131653-2-b-padhi@ti.com/
> 
> v2: Changelog:
> 1) Refactored changes from k3-j722s.dtsi to k3-j722s-main.dtsi. (Andrew)
> 
> Link to v1:
> https://lore.kernel.org/all/20240607090433.488454-2-b-padhi@ti.com/
> 
>   arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 61 +++++++++++++++++++++++
>   1 file changed, 61 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> index cadb4f7c2ea9..ed6f4ba08afc 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> @@ -153,6 +153,67 @@ usb1: usb at 31200000{
>   			dr_mode = "otg";
>   		};
>   	};
> +
> +	main_r5fss0: r5fss at 78400000 {
> +		compatible = "ti,am62-r5fss";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x78400000 0x00 0x78400000 0x8000>,
> +			 <0x78500000 0x00 0x78500000 0x8000>;
> +		power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +
> +		main_r5fss0_core0: r5f at 78400000 {
> +			compatible = "ti,am62-r5f";
> +			reg = <0x78400000 0x00008000>,
> +			      <0x78500000 0x00008000>;
> +			reg-names = "atcm", "btcm";
> +			resets = <&k3_reset 262 1>;
> +			firmware-name = "j722s-main-r5f0_0-fw";
> +			ti,sci = <&dmsc>;
> +			ti,sci-dev-id = <262>;
> +			ti,sci-proc-ids = <0x04 0xff>;
> +			ti,atcm-enable = <1>;
> +			ti,btcm-enable = <1>;
> +			ti,loczrama = <1>;
> +		};
> +	};
> +
> +	c7x_0: dsp at 7e000000 {
> +		compatible = "ti,am62a-c7xv-dsp";
> +		reg = <0x00 0x7e000000 0x00 0x00200000>;
> +		reg-names = "l2sram";
> +		resets = <&k3_reset 208 1>;
> +		firmware-name = "j722s-c71_0-fw";
> +		ti,sci = <&dmsc>;
> +		ti,sci-dev-id = <208>;
> +		ti,sci-proc-ids = <0x30 0xff>;
> +		status = "disabled";
> +	};
> +
> +	c7x_1: dsp at 7e200000 {
> +		compatible = "ti,am62a-c7xv-dsp";
> +		reg = <0x00 0x7e200000 0x00 0x00200000>;
> +		reg-names = "l2sram";
> +		resets = <&k3_reset 268 1>;
> +		firmware-name = "j722s-c71_1-fw";
> +		ti,sci = <&dmsc>;
> +		ti,sci-dev-id = <268>;
> +		ti,sci-proc-ids = <0x31 0xff>;
> +		status = "disabled";
> +	};
> +};
> +
> +/* MCU domain overrides */
> +
> +&mcu_r5fss0_core0 {
> +	firmware-name = "j722s-mcu-r5f0_0-fw";
> +};
> +
> +/* Wakeup domain overrides */
> +
> +&wkup_r5fss0_core0 {
> +	firmware-name = "j722s-wkup-r5f0_0-fw";
>   };
>   
>   &main_conf {