[PATCH] ARM: dts: stm32: Disable PHY clock output on DH STM32MP13xx DHCOR DHSBC board

[Alexandre TORGUE]

Hi Marek

On 7/5/24 10:01, Marek Vasut wrote:
> The RTL8211F PHY clock output is not used on DH STM32MP13xx DHCOR DHSBC
> board, disable it to improve EMI characteristics.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Alexandre Torgue <alexandre.torgue at foss.st.com>
> Cc: Christophe Roullier <christophe.roullier at foss.st.com>
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com>
> Cc: Rob Herring <robh at kernel.org>
> Cc: devicetree at vger.kernel.org
> Cc: kernel at dh-electronics.com
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-stm32 at st-md-mailman.stormreply.com
> ---
>   arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
> index 3cc9ad88d61bc..425deb5641c17 100644
> --- a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
> +++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
> @@ -96,6 +96,7 @@ ethphy1: ethernet-phy at 1 {
>   			interrupt-parent = <&gpiog>;
>   			interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
>   			reg = <1>;
> +			realtek,clkout-disable;
>   			reset-assert-us = <15000>;
>   			reset-deassert-us = <55000>;
>   			reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
> @@ -125,6 +126,7 @@ ethphy2: ethernet-phy at 1 {
>   			interrupt-parent = <&gpiog>;
>   			interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
>   			reg = <1>;
> +			realtek,clkout-disable;
>   			reset-assert-us = <15000>;
>   			reset-deassert-us = <55000>;
>   			reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;

Applied on stm32-next.

Regards
Alex