[PATCH] cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriately
Dhruva Gole
d-gole at ti.com
Fri Aug 30 03:04:05 PDT 2024
Hi,
On Aug 28, 2024 at 08:19:15 -0500, Nishanth Menon wrote:
> Commit b4bc9f9e27ed ("cpufreq: ti-cpufreq: add support for omap34xx
> and omap36xx") introduced special handling for OMAP3 class devices
> where syscon node may not be present. However, this also creates a bug
> where the syscon node is present, however the offset used to read
> is beyond the syscon defined range.
>
> Fix this by providing a quirk option that is populated when such
> special handling is required. This allows proper failure for all other
> platforms when the syscon node and efuse offsets are mismatched.
>
> Fixes: b4bc9f9e27ed ("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx")
> Signed-off-by: Nishanth Menon <nm at ti.com>
> ---
>
> NOTE: this combined with https://lore.kernel.org/r/20240828121008.3066002-1-nm@ti.com
> has created a bunch of un-intended bugs on other TI SoCs such
> as seen in https://lore.kernel.org/all/20240826-opp-v3-1-0934f8309e13@ti.com/
> https://lore.kernel.org/all/20240827131342.6wrielete3yeoinl@bryanbrattlof.com/
> etc.
I have been able to verify that this doesn't cause any regressions on
AM62x cpufreq, logs [0]. I also applied the other syscon patch mentioned
above. So,
Tested-by: Dhruva Gole <d-gole at ti.com>
[0] https://gist.github.com/DhruvaG2000/153b5511889180ee54703603428fb77e
--
Best regards,
Dhruva Gole
Texas Instruments Incorporated
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