[PATCH v2 5/8] iommu/arm-smmu-v3: Report IOMMU_CAP_ENFORCE_CACHE_COHERENCY for CANWBS
Jason Gunthorpe
jgg at nvidia.com
Wed Aug 28 12:12:35 PDT 2024
On Tue, Aug 27, 2024 at 01:12:27PM -0700, Nicolin Chen wrote:
> > @@ -2693,6 +2718,15 @@ static int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state,
> > * one of them.
> > */
> > spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> > + if (smmu_domain->enforce_cache_coherency &&
> > + !(dev_iommu_fwspec_get(master->dev)->flags &
> > + IOMMU_FWSPEC_PCI_RC_CANWBS)) {
>
> How about a small dev_enforce_cache_coherency() helper?
I added a
+static bool arm_smmu_master_canwbs(struct arm_smmu_master *master)
+{
+ return dev_iommu_fwspec_get(master->dev)->flags &
+ IOMMU_FWSPEC_PCI_RC_CANWBS;
+}
+
> > + kfree(master_domain);
> > + spin_unlock_irqrestore(&smmu_domain->devices_lock,
> > + flags);
> > + return -EINVAL;
>
> kfree() doesn't need to be locked.
Yep
Thanks,
Jason
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