[PATCH v1 04/12] nvmem: microchip-otpc: Add SAM9X60 support

Alexander Dahl ada at thorsis.com
Wed Aug 28 01:09:50 PDT 2024


Hello Claudiu,

Am Sat, Aug 24, 2024 at 06:53:53PM +0300 schrieb claudiu beznea:
> 
> 
> On 21.08.2024 13:59, Alexander Dahl wrote:
> > Register layout is almost identical to sama7g5 OTPC.
> 
> Can you please mention some major differences?

- SAMA7G5 has an additional bit SECURE in the OTPC Header Register
  (OTPC_HR) not present on SAM9X60.
- SAMA7G5 has an additional register OTPC Secure Custom Address
  Register (OTPC_SCAR) not present on SAM9X60.
- SAMA7G5 has an additional field SECDBG[7:0] in OTPC User Hardware
  Configuration 0 Register (OTPC_UHC0R) not present on SAM9X60.
- SAMA7G5 has three additional bits (SCPGDIS, SCLKDIS, SCINVDIS) in
  the OTPC User Hardware Configuration 1 Register (OTPC_UHC1R) not
  present on SAM9X60.

All are currently not used by the driver.

Is adding this information to the commit message sufficient?

Greets
Alex

> 
> > 
> > Signed-off-by: Alexander Dahl <ada at thorsis.com>
> > ---
> >  drivers/nvmem/microchip-otpc.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> > index bd3383eabdf6..b8ed7412dbca 100644
> > --- a/drivers/nvmem/microchip-otpc.c
> > +++ b/drivers/nvmem/microchip-otpc.c
> > @@ -271,6 +271,7 @@ static int mchp_otpc_probe(struct platform_device *pdev)
> >  
> >  static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
> >  	{ .compatible = "microchip,sama7g5-otpc", },
> > +	{ .compatible = "microchip,sam9x60-otpc", },
> >  	{ },
> >  };
> >  MODULE_DEVICE_TABLE(of, mchp_otpc_ids);



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