[PATCH v2 3/6] dt-bindings: PCI: ti,am65: Extend for use with PVU

[Krzysztof Kozlowski]

On Mon, Aug 26, 2024 at 11:50:04PM +0200, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka at siemens.com>
> 
> Describe also the VMAP registers which are needed in order to make use
> of the PVU with this PCI host. Furthermore, permit to specify a
> restricted DMA pool by phandle.

That's an ABI break without explanation why it is necessary.

> 
> Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
> ---
>  .../devicetree/bindings/pci/ti,am65-pci-host.yaml   | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> index 0a9d10532cc8..72f78f21e1e8 100644
> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> @@ -20,7 +20,7 @@ properties:
>        - ti,keystone-pcie
>  
>    reg:
> -    maxItems: 4
> +    maxItems: 6
>  
>    reg-names:
>      items:
> @@ -28,6 +28,8 @@ properties:
>        - const: dbics
>        - const: config
>        - const: atu
> +      - const: vmap_lp
> +      - const: vmap_hp
>  
>    interrupts:
>      maxItems: 1
> @@ -69,6 +71,9 @@ properties:
>      items:
>        pattern: '^pcie-phy[0-1]$'
>  
> +  memory-region:
> +    description: phandle to restricted DMA pool to be used for all devices behind this controller

missing constraints, maxItems

Best regards,
Krzysztof