[PATCH v2] arm64: dts: ti: k3-am64* Disable ethernet by default at SoC level

Logan Bristol logan.bristol at utexas.edu
Mon Aug 26 14:12:18 PDT 2024


Hi Josua,

On 8/25/2024 6:18 AM, Josua Mayer wrote:
> Hi Logan,
> 
> Tank you for incorporating the requested changes,
> unfortunately I found another mistake ... see below.
> 
> Am 09.08.24 um 16:57 schrieb Logan Bristol:
>> External interfaces should be disabled at the SoC DTSI level, since
>> the node is incomplete. Disable Ethernet switch and ports in SoC DTSI
>> and enable them in the board DTS. If the board DTS includes a SoM DTSI
>> that completes the node description, enable the Ethernet switch and ports
>> in SoM DTSI.
>>
>> Reflect this change in SoM DTSIs by removing ethernet port disable.
>>
>> Signed-off-by: Logan Bristol <logan.bristol at utexas.edu>
>> ---
>> Changes since v1:
>> - Enabled cpsw3g and cpsw_port1 in SoM DTSI instead of board DTS
>> if board DTS included SoM DTSI
>> ---
>>    arch/arm64/boot/dts/ti/k3-am64-main.dtsi               | 3 +++
>>    arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi        | 6 ++----
>>    arch/arm64/boot/dts/ti/k3-am642-evm.dts                | 3 +++
>>    arch/arm64/boot/dts/ti/k3-am642-sk.dts                 | 3 +++
>>    arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi            | 6 ++----
>>    arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 6 ++----
>>    6 files changed, 15 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> index f8370dd03350..69c5af58b727 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> @@ -677,6 +677,7 @@ cpsw3g: ethernet at 8000000 {
>>    		assigned-clock-parents = <&k3_clks 13 9>;
>>    		clock-names = "fck";
>>    		power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
>> +		status = "disabled";
>>    
>>    		dmas = <&main_pktdma 0xC500 15>,
>>    		       <&main_pktdma 0xC501 15>,
>> @@ -701,6 +702,7 @@ cpsw_port1: port at 1 {
>>    				phys = <&phy_gmii_sel 1>;
>>    				mac-address = [00 00 00 00 00 00];
>>    				ti,syscon-efuse = <&main_conf 0x200>;
>> +				status = "disabled";
>>    			};
>>    
>>    			cpsw_port2: port at 2 {
>> @@ -709,6 +711,7 @@ cpsw_port2: port at 2 {
>>    				label = "port2";
>>    				phys = <&phy_gmii_sel 2>;
>>    				mac-address = [00 00 00 00 00 00];
>> +				status = "disabled";
>>    			};
>>    		};
>>    
> ...
>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> index c19d0b8bbf0f..a5cec9a07510 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> @@ -177,6 +177,7 @@ vdd_mmc0: regulator-vdd-mmc0 {
>>    &cpsw3g {
>>    	pinctrl-names = "default";
>>    	pinctrl-0 = <&rgmii1_default_pins>;
>> +	status = "okay";
> correct
>>    };
>>    
>>    &cpsw3g_mdio {
>> @@ -210,10 +211,7 @@ ethernet_phy0: ethernet-phy at 0 {
>>    &cpsw_port1 {
>>    	phy-mode = "rgmii-id";
>>    	phy-handle = <&ethernet_phy0>;
> We use this port on the SoM, please set status okay.
>> -};
>> -
>> -&cpsw_port2 {
>> -	status = "disabled";
>> +	status = "okay";
> We are not using this port on the SoM, drop node to keep status disabled.

My understanding is that the cpsw_port1 node should be enabled and the 
cpsw_port2 node should not exist in this DTSI. If my understanding is 
correct, isn't that shown in this diff?

Thank you,
Logan Bristol




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