[PATCH v1 11/12] nvmem: microchip-otpc: Enable main RC oscillator clock

[claudiu beznea]

On 21.08.2024 13:59, Alexander Dahl wrote:
> Without enabling that clock, initializing the packet list leads to a
> read timeout on the first packet.
> 
> According to SAM9X60 datasheet (DS60001579G) section "23.4 Product
> Dependencies" the clock must be enabled for reading and writing.
> 
> Tested on sam9x60-curiosity board.
> 
> Signed-off-by: Alexander Dahl <ada at thorsis.com>
> ---
>  drivers/nvmem/microchip-otpc.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> index a80535c3d162..047ca5ac6407 100644
> --- a/drivers/nvmem/microchip-otpc.c
> +++ b/drivers/nvmem/microchip-otpc.c
> @@ -8,6 +8,7 @@
>   */
>  
>  #include <linux/bitfield.h>
> +#include <linux/clk.h>
>  #include <linux/dev_printk.h>
>  #include <linux/iopoll.h>
>  #include <linux/module.h>
> @@ -54,6 +55,7 @@
>  struct mchp_otpc {
>  	void __iomem *base;
>  	struct device *dev;
> +	struct clk *clk;
>  	struct list_head packets;
>  	u32 npackets;
>  };
> @@ -272,6 +274,15 @@ static int mchp_otpc_probe(struct platform_device *pdev)
>  	if (IS_ERR(otpc->base))
>  		return PTR_ERR(otpc->base);
>  
> +	// NOTE: Maybe make this optional, especially if sama7g5 testing

Looking though DS, on SAMA7G5 the clock here should be MCK0. I think it
should be added for SAMA7G5, too, with a fixes tag.

> +	// shows the clock is not required there?

Use C style comments /* comment */

> +	otpc->clk = devm_clk_get_enabled(&pdev->dev, "main_rc_osc");

Maybe name it "bus-clk", "bus" or something otpc specific.

> +	if (IS_ERR(otpc->clk)) {
> +		dev_err(&pdev->dev, "Error (%ld) getting clock!\n",
> +			PTR_ERR(otpc->clk));
> +		return PTR_ERR(otpc->clk);

return dev_err_probe().

> +	}
> +
>  	reg = readl_relaxed(otpc->base + MCHP_OTPC_WPSR);
>  	if (reg)
>  		dev_warn(&pdev->dev,