[PATCH v5 06/30] arm64: context switch POR_EL0 register
Will Deacon
will at kernel.org
Fri Aug 23 07:45:32 PDT 2024
On Thu, Aug 22, 2024 at 04:10:49PM +0100, Joey Gouly wrote:
> POR_EL0 is a register that can be modified by userspace directly,
> so it must be context switched.
>
> Signed-off-by: Joey Gouly <joey.gouly at arm.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>
> ---
> arch/arm64/include/asm/cpufeature.h | 6 ++++++
> arch/arm64/include/asm/processor.h | 1 +
> arch/arm64/include/asm/sysreg.h | 3 +++
> arch/arm64/kernel/process.c | 28 ++++++++++++++++++++++++++++
> 4 files changed, 38 insertions(+)
[...]
> +static void permission_overlay_switch(struct task_struct *next)
> +{
> + if (!system_supports_poe())
> + return;
> +
> + current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);
> + if (current->thread.por_el0 != next->thread.por_el0) {
> + write_sysreg_s(next->thread.por_el0, SYS_POR_EL0);
> + /* ISB required for kernel uaccess routines when chaning POR_EL0 */
nit: typo "chaning".
But more substantially, is this just to prevent spurious faults in the
context of a new thread using a stale value for POR_EL0?
Will
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