[PATCH v1 15/16] iommu/arm-smmu-v3: Add viommu cache invalidation support

Jason Gunthorpe jgg at nvidia.com
Mon Aug 19 11:47:16 PDT 2024


On Mon, Aug 19, 2024 at 11:38:22AM -0700, Nicolin Chen wrote:
> On Mon, Aug 19, 2024 at 03:28:11PM -0300, Jason Gunthorpe wrote:
> > On Mon, Aug 19, 2024 at 11:19:39AM -0700, Nicolin Chen wrote:
> > 
> > > > But nesting enablment with out viommu is alot less useful than I had
> > > > thought :(
> > > 
> > > Actually, without viommu, the hwpt cache invalidate alone could
> > > still support non-SVA case?
> > 
> > That is what I thought, but doesn't the guest still have to invalidate
> > the CD table entry # 0?
> 
> I recall it doesn't. The CD cache invalidation is required in the
> viommu invalidation for an SVA case where we need a PASID number
> to specify CD to the substream. But the CD to the default stream
> is only changed during a vSTE setup, and the host knows the PASID
> number (=0)?

I think that would subtly assume certain things about how the driver
does ordering, ie the that CD table entry 0 is setup with the S1
before we load it into the STE.

Yes, the Linux driver does that now, but I don't think anyone should
rely on that..

Jason



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