[PATCH 0/3] arm64: errata: Expand speculative SSBS workaround (again)

[Catalin Marinas]

On Thu, 01 Aug 2024 11:18:00 +0100, Mark Rutland wrote:
> A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS
> special-purpose register does not affect subsequent speculative
> instructions, permitting speculative store bypassing for a window of
> time.
> 
> We worked around this for a number of CPUs in commits:
> 
> [...]

Applied to arm64 (for-next/fixes), thanks!

[1/3] arm64: cputype: Add Cortex-X1C definitions
      https://git.kernel.org/arm64/c/58d245e03c32
[2/3] arm64: cputype: Add Cortex-A725 definitions
      https://git.kernel.org/arm64/c/9ef54a384526
[3/3] arm64: errata: Expand speculative SSBS workaround (again)
      https://git.kernel.org/arm64/c/adeec61a4723

-- 
Catalin