[PATCH 1/3] arm64: cputype: Add Cortex-X1C definitions

[Anshuman Khandual]

On 8/1/24 15:48, Mark Rutland wrote:
> Add cputype definitions for Cortex-X1C. These will be used for errata
> detection in subsequent patches.
> 
> These values can be found in the Cortex-X1C TRM:
> 
>   https://developer.arm.com/documentation/101968/0002/
> 
> ... in section B2.107 ("MIDR_EL1, Main ID Register, EL1").
> 
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: James Morse <james.morse at arm.com>
> Cc: Will Deacon <will at kernel.org>
> ---
>  arch/arm64/include/asm/cputype.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 1cb0704c6163f..5dc68ace305e5 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -86,6 +86,7 @@
>  #define ARM_CPU_PART_CORTEX_X2		0xD48
>  #define ARM_CPU_PART_NEOVERSE_N2	0xD49
>  #define ARM_CPU_PART_CORTEX_A78C	0xD4B
> +#define ARM_CPU_PART_CORTEX_X1C		0xD4C
>  #define ARM_CPU_PART_CORTEX_X3		0xD4E
>  #define ARM_CPU_PART_NEOVERSE_V2	0xD4F
>  #define ARM_CPU_PART_CORTEX_A720	0xD81
> @@ -165,6 +166,7 @@
>  #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
>  #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
>  #define MIDR_CORTEX_A78C	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
> +#define MIDR_CORTEX_X1C	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C)
>  #define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3)
>  #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)
>  #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720)

The CPU part number 0xD4C checks out in the mentioned document above.

Reviewed-by: Anshuman Khandual <anshuman.khandual at arm.com>