[PATCH v4] arm64: dts: imx8ulp: add caam jr

[Peng Fan]

> Subject: RE: [PATCH v4] arm64: dts: imx8ulp: add caam jr
> 
> If there are no further comments.
> Please merge this patch.

Shawn has picked it up one week ago.

Regards,
Peng.
> 
> Regards
> Pankaj
> 
> > -----Original Message-----
> > From: Pankaj Gupta
> > Sent: Tuesday, April 9, 2024 2:53 PM
> > To: robh+dt at kernel.org; krzysztof.kozlowski+dt at linaro.org;
> > conor+dt at kernel.org; shawnguo at kernel.org; s.hauer at pengutronix.de;
> > kernel at pengutronix.de; festevam at gmail.com; dl-linux-imx <linux-
> > imx at nxp.com>; Peng Fan <peng.fan at nxp.com>; Jacky Bai
> > <ping.bai at nxp.com>; Bough Chen <haibo.chen at nxp.com>;
> > devicetree at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> > linux- kernel at vger.kernel.org
> > Cc: Pankaj Gupta <pankaj.gupta at nxp.com>; Varun Sethi
> <V.Sethi at nxp.com>
> > Subject: [PATCH v4] arm64: dts: imx8ulp: add caam jr
> >
> > Add crypto node in device tree for:
> > - CAAM job-ring
> >
> > Signed-off-by: Varun Sethi <v.sethi at nxp.com>
> > Signed-off-by: Pankaj Gupta <pankaj.gupta at nxp.com>
> > ---
> >
> > v4:
> >  - Order of node properties changed.
> >
> > v3:
> >  - Commit message title is changed from "imx8ulp-evk" to "imx8ulp".
> >
> > v2:
> >  - As requested, this patch is separated from the larger patch-set of 9
> >    patches.
> >
> > Commit
> >  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32
> > ++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > index 8a6596d5a581..ed86854a59c3 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > @@ -252,6 +252,38 @@ pcc3: clock-controller at 292d0000 {
> >  				#reset-cells = <1>;
> >  			};
> >
> > +			crypto: crypto at 292e0000 {
> > +				compatible = "fsl,sec-v4.0";
> > +				reg = <0x292e0000 0x10000>;
> > +				ranges = <0 0x292e0000 0x10000>;
> > +				#address-cells = <1>;
> > +				#size-cells = <1>;
> > +
> > +				sec_jr0: jr at 1000 {
> > +					compatible = "fsl,sec-v4.0-job-ring";
> > +					reg = <0x1000 0x1000>;
> > +					interrupts = <GIC_SPI 82
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				};
> > +
> > +				sec_jr1: jr at 2000 {
> > +					compatible = "fsl,sec-v4.0-job-ring";
> > +					reg = <0x2000 0x1000>;
> > +					interrupts = <GIC_SPI 82
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				};
> > +
> > +				sec_jr2: jr at 3000 {
> > +					compatible = "fsl,sec-v4.0-job-ring";
> > +					reg = <0x3000 0x1000>;
> > +					interrupts = <GIC_SPI 82
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				};
> > +
> > +				sec_jr3: jr at 4000 {
> > +					compatible = "fsl,sec-v4.0-job-ring";
> > +					reg = <0x4000 0x1000>;
> > +					interrupts = <GIC_SPI 82
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				};
> > +			};
> > +
> >  			tpm5: tpm at 29340000 {
> >  				compatible = "fsl,imx8ulp-tpm",
> "fsl,imx7ulp- tpm";
> >  				reg = <0x29340000 0x1000>;
> > --
> > 2.34.1