[PATCH 2/2] arm64: dts: allwinner: h616: Add LRADC node
Andre Przywara
andre.przywara at arm.com
Tue Apr 23 03:11:29 PDT 2024
On Mon, 22 Apr 2024 17:45:11 +0100
Andre Przywara <andre.przywara at arm.com> wrote:
Hi,
> From: James McGregor <jamcgregor at protonmail.com>
>
> Add a DT node for the Allwinner H616 LRADC describing the base address,
> interrupt, reset and clock gates.
>
> Signed-off-by: James McGregor <jamcgregor at protonmail.com>
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> index a061b69c07c2..58fb28f83feb 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> @@ -125,6 +125,16 @@ sram_c: sram at 28000 {
> };
> };
>
> + lradc: lradc at 5070800 {
The nodes under the /soc node are ordered by their MMIO address, so this
needs to be moved down, after the THS node.
> + compatible = "allwinner,sun50i-h616-lradc",
> + "allwinner,sun50i-r329-lradc";
> + reg = <0x05070800 0x400>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_KEYADC>;
> + resets = <&ccu RST_BUS_KEYADC>;
Compared against the manual, and can confirm the MMIO base address,
clock, reset and IRQ number.
Also the IP descriptions looks the same as in the R329 manual.
So with the node moved around:
Reviewed-by: Andre Przywara <andre.przywara at arm.com>
Cheers,
Andre
> + status = "disabled";
> + };
> +
> ccu: clock at 3001000 {
> compatible = "allwinner,sun50i-h616-ccu";
> reg = <0x03001000 0x1000>;
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