[PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock

[Peng Fan]

> Subject: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
> 
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the two CSI2 pixel clock set
> to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode frequency which is 500
> MHz down below the regular mode frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: Fabio Estevam <festevam at gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Cc: Paul Elder <paul.elder at ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
> Cc: Rob Herring <robh at kernel.org>
> Cc: Sascha Hauer <s.hauer at pengutronix.de>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: devicetree at vger.kernel.org
> Cc: imx at lists.linux.dev
> Cc: linux-arm-kernel at lists.infradead.org

Reviewed-by: Peng Fan <peng.fan at nxp.com>
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi at 32e40000 {
>  						  <&clk
> IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk
> IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl
> IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
> 
> --
> 2.43.0
>