[PATCH 10/37] clk: renesas: rzg2l: use core->name for clock name
Claudiu
claudiu.beznea at tuxon.dev
Mon Sep 11 21:51:30 PDT 2023
From: Claudiu Beznea <claudiu.beznea.uj at bp.renesas.com>
core->name already contains the clock name thus, there is no
need to check the GET_SHIFT(core->conf) to decide on it.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj at bp.renesas.com>
---
drivers/clk/renesas/rzg2l-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index b391c9548421..44226682db2c 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -266,7 +266,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core,
clk_hw_data->priv = priv;
clk_hw_data->conf = core->conf;
- init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0";
+ init.name = core->name;
init.ops = &rzg2l_cpg_sd_clk_mux_ops;
init.flags = 0;
init.num_parents = core->num_parents;
--
2.39.2
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