[PATCH v3 2/4] arm64: dts: imx8mp-phyboard-pollux: Enable USB support
Cem Tenruh
c.tenruh at phytec.de
Tue Sep 5 07:25:53 PDT 2023
From: Teresa Remmet <t.remmet at phytec.de>
Enable USB support for both interfaces in host mode.
USB1 is directly conncted to a type-A connector and USB2
is attached to a 4-Port USB Hub.
Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
Reviewed-by: Fabio Estevam <festevam at gmail.com>
---
Changes in v3:
- removed "regulator-always-on" protperty
Changes in v2:
- No changes
---
.../freescale/imx8mp-phyboard-pollux-rdk.dts | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 1750fadb64c3..494a40077d16 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -39,6 +39,16 @@ reg_can2_stby: regulator-can2-stby {
regulator-name = "can2-stby";
};
+ reg_usb1_vbus: regulator-usb1-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1_vbus>;
+ gpio = <&gpio1 12 GPIO_ACTIVE_LOW>;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb1_host_vbus";
+ };
+
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -136,6 +146,37 @@ &uart1 {
status = "okay";
};
+/* USB1 Host mode Type-A */
+&usb3_phy0 {
+ vbus-supply = <®_usb1_vbus>;
+ status = "okay";
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb_dwc3_0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+/* USB2 4-port USB3.0 HUB */
+&usb3_phy1 {
+ status = "okay";
+};
+
+&usb3_1 {
+ fsl,permanently-attached;
+ fsl,disable-port-power-control;
+ status = "okay";
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
/* SD-Card */
&usdhc2 {
assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
@@ -224,6 +265,12 @@ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x40
>;
};
+ pinctrl_usb1_vbus: usb1vbusgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x10
+ >;
+ };
+
pinctrl_usdhc2_pins: usdhc2-gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
--
2.25.1
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