Rockchip: Possible to increase AHB/DMAC1 speed/reduce latency peaks?
Pavel Hofman
pavel.hofman at ivitera.com
Tue Sep 5 02:32:06 PDT 2023
Hi,
I am trying to increase samplerate of I2S controller on Rockchip RK3568.
The hardware is specced up to 192kHz. A simple change of hard-coded rate
limit in the linux I2S ASoC driver allows testing higher samplerates.
I am running an I2S SDO -> SDI loopback. The loopback is bit-perfect at
384kHz. At 768kHz the captured stream contains added blocks of 5-10 zero
samples and blocks of dropped samples, several tens of disruptions per
second. IMO the added zeros means the playback DMA does not keep up
feeding the I2S output FIFO, the dropped samples are caused by the
capture DMA not keeping up draining the I2S input FIFO to memory.
The FIFOs are 32-items long. As a note - the I2S FIFOs in BCM2711 SoC of
RaspberryPi4 are 64-items long and the 768kHz samplerate loopback runs
reliably there (but only 2 channels max are available :-( )
IIUC the RK3568 I2S controllers are served by DMAC1 which does not seem
to serve any other high-bandwidth peripheral (pages 17-18 of
https://dl.radxa.com/rock3/docs/hw/datasheet/Rockchip%20RK3568%20TRM%20Part1%20V1.1-20210301.pdf
). Only one I2S controller is enabled in my case.
Please is there possibly any way to increase the AMB frequency->
bandwidth and/or DMAC performance, or to reduce some possible latency
glitches along the chain? Is there any way to monitor the DMAC
performance and even the AMB bus load/performance?
It is likely the only way is to use a different SoC. But I would like to
check all options first :-)
Thanks a lot for any hints and information.
With regards,
Pavel.
More information about the linux-arm-kernel
mailing list