[PATCH v4 07/12] KVM: arm64: Prepare TCR_EL2.PS in cpu_prepare_hyp_mode()

[Ryan Roberts]

On 20/10/2023 10:21, Marc Zyngier wrote:
> On Mon, 09 Oct 2023 19:50:03 +0100,
> Ryan Roberts <ryan.roberts at arm.com> wrote:
>>
>> With the addition of LPA2 support in the hypervisor, the PA size
>> supported by the HW must be capped with a runtime decision, rather than
>> simply using a compile-time decision based on PA_BITS. For example, on a
>> system that advertises 52 bit PA but does not support FEAT_LPA2, A 4KB
>> or 16KB kernel compiled with LPA2 support must still limit the PA size
>> to 48 bits.
>>
>> Therefore, move the insertion of the PS field into TCR_EL2 out of
>> __kvm_hyp_init assembly code and instead do it in cpu_prepare_hyp_mode()
>> where the rest of TCR_EL2 is prepared. This allows us to figure out PS
>> with kvm_get_parange(), which has the appropriate logic to ensure the
>> above requirement. (and the PS field of VTCR_EL2 is already populated
>> this way).
>>
>> Signed-off-by: Ryan Roberts <ryan.roberts at arm.com>
>> ---
>>  arch/arm64/kvm/arm.c               | 3 +++
>>  arch/arm64/kvm/hyp/nvhe/hyp-init.S | 4 ----
>>  2 files changed, 3 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>> index 73cc67c2a8a7..0bb8918475d2 100644
>> --- a/arch/arm64/kvm/arm.c
>> +++ b/arch/arm64/kvm/arm.c
>> @@ -1726,6 +1726,7 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)
>>  {
>>  	struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu);
>>  	unsigned long tcr;
>> +	u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
> 
> nit: move this one up by a line (yes, I'm being difficult).

ACK.

> 
>>  
>>  	/*
>>  	 * Calculate the raw per-cpu offset without a translation from the
>> @@ -1747,6 +1748,8 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)
>>  	}
>>  	tcr &= ~TCR_T0SZ_MASK;
>>  	tcr |= TCR_T0SZ(hyp_va_bits);
>> +	tcr &= ~TCR_EL2_PS_MASK;
>> +	tcr |= FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0));
>>  	if (system_supports_lpa2())
>>  		tcr |= TCR_EL2_DS;
>>  	params->tcr_el2 = tcr;
>> diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
>> index 1cc06e6797bd..f62a7d360285 100644
>> --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
>> +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
>> @@ -122,11 +122,7 @@ alternative_if ARM64_HAS_CNP
>>  alternative_else_nop_endif
>>  	msr	ttbr0_el2, x2
>>  
>> -	/*
>> -	 * Set the PS bits in TCR_EL2.
>> -	 */
>>  	ldr	x0, [x0, #NVHE_INIT_TCR_EL2]
>> -	tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2
>>  	msr	tcr_el2, x0
>>  
>>  	isb
> 
> Ah, this is where this was hiding. This should be folded into the
> previous patch for consistency (this is otherwise non bisectable).

ACK.

> 
> Thanks,
> 
> 	M.
>