[PATCH 04/19] iommu/arm-smmu-v3: Make STE programming independent of the callers

[Jason Gunthorpe]

On Wed, Oct 18, 2023 at 09:24:35AM -0300, Jason Gunthorpe wrote:

> Let me see if we can get a deeper understanding here, it is a good
> point.

Nicolin found in the specification "13.5 Summary of
attribute/permission configuration fields" which the row for STE.SHCFG
says it is only read for "Bypass" or "Stage 2 Only"

In Stage 2 mode is combined with the IOPTE (TTD?) and since the kernel
sets it to 0 (weakest) it basically looks like it means the IOPTE
overrides? In Stage 1 only mode (eg the PASID case I worried about) it
only comes from the IOPTE.

So like this:

@@ -1393,12 +1393,14 @@ static void arm_smmu_get_ste_used(const struct arm_smmu_ste *ent,
                                    STRTAB_STE_1_S1STALLD | STRTAB_STE_1_STRW);
                used_bits->data[1] |= cpu_to_le64(STRTAB_STE_1_EATS);
 
+               /* See 13.5 Summary of attribute/permission configuration fields */
                if (FIELD_GET(STRTAB_STE_1_S1DSS, le64_to_cpu(ent->data[1])) ==
                    STRTAB_STE_1_S1DSS_BYPASS)
                        used_bits->data[1] |= cpu_to_le64(STRTAB_STE_1_SHCFG);
                break;
        case STRTAB_STE_0_CFG_S2_TRANS:
-               used_bits->data[1] |= cpu_to_le64(STRTAB_STE_1_EATS);
+               used_bits->data[1] |=
+                       cpu_to_le64(STRTAB_STE_1_EATS | STRTAB_STE_1_SHCFG);
                used_bits->data[2] |=
                        cpu_to_le64(STRTAB_STE_2_S2VMID | STRTAB_STE_2_VTCR |
                                    STRTAB_STE_2_S2AA64 | STRTAB_STE_2_S2ENDI |

Thanks,
Jason