[PATCH v4 2/2] arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux

reidt reidt at ti.com
Thu Oct 19 12:15:19 PDT 2023


On 13:54-20231009, Vaishnav Achath wrote:
> From: Nishanth Menon <nm at ti.com>
> 
> FSS node claims to be a syscon node, while it actually is a simple bus
> where OSPI, HBMC peripherals are located and a mux for path select
> between OSPI and Hyperbus which can be modelled as a reg-mux. So model
> it accordingly and use reg-mux to describe the hbmc_mux.
> 
> Signed-off-by: Nishanth Menon <nm at ti.com>
> Signed-off-by: Vaishnav Achath <vaishnav.a at ti.com>
> ---
> 
> V2->V3:
>  * Keep register regions unchanged as it is correct according to memory
>   map.
>  * Update commit messages as per Vignesh's suggestion.
> 
> V1->V2:
>  * Address feedback from Udit to limit the FSS register region size as
>  per TRM.
>  * Use reg-mux changes to simplify the hbmc-mux modelling.
>  * Update commit message to reflect changes.
> 
> Depends on:
>  https://lore.kernel.org/all/20230911151030.71100-1-afd@ti.com/
> 
>  arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 2ee6215e38a6..4f98ea685d33 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -507,15 +507,16 @@
>  		status = "disabled";
>  	};
>  
> -	fss: syscon at 47000000 {
> -		compatible = "syscon", "simple-mfd";
> +	fss: bus at 47000000 {
> +		compatible = "simple-bus";
>  		reg = <0x00 0x47000000 0x00 0x100>;
>  		#address-cells = <2>;
>  		#size-cells = <2>;
>  		ranges;
>  
> -		hbmc_mux: hbmc-mux {
> -			compatible = "mmio-mux";
> +		hbmc_mux: mux-controller at 47000004 {
> +			compatible = "reg-mux";
> +			reg = <0x00 0x47000004 0x00 0x2>;
>  			#mux-control-cells = <1>;
>  			mux-reg-masks = <0x4 0x2>; /* HBMC select */
>  		};
> -- 
> 2.17.1
> 
> 

Reviewed-by: Reid Tonking <reidt at ti.com>



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