[EXT] Re: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property

Linu Cherian lcherian at marvell.com
Wed Oct 18 18:12:22 PDT 2023


Hi Conor,

> -----Original Message-----
> From: Conor Dooley <conor at kernel.org>
> Sent: Saturday, October 14, 2023 6:56 PM
> To: Linu Cherian <lcherian at marvell.com>
> Cc: Mike Leach <mike.leach at linaro.org>; suzuki.poulose at arm.com;
> james.clark at arm.com; leo.yan at linaro.org; linux-arm-
> kernel at lists.infradead.org; coresight at lists.linaro.org; linux-
> kernel at vger.kernel.org; robh+dt at kernel.org;
> krzysztof.kozlowski+dt at linaro.org; conor+dt at kernel.org;
> devicetree at vger.kernel.org; Sunil Kovvuri Goutham
> <sgoutham at marvell.com>; George Cherian <gcherian at marvell.com>
> Subject: Re: [EXT] Re: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add
> "memory-region" property
> 
> On Sat, Oct 14, 2023 at 11:36:37AM +0000, Linu Cherian wrote:
> > > > +      - description: Reserved meta data memory. Used for ETR and ETF
> sinks.
> > > > +
> > > > +  memory-region-names:
> > > > +    items:
> > > > +      - const: trace-mem
> > > > +      - const: metadata-mem
> > > > +
> > >
> > > Is there a constraint required here? If we are using the memory area
> > > for trace in a panic situation, then we must have the meta data
> > > memory area defined?
> > > Perhaps a set of names such as "etr-trace-mem", "panic-trace-mem" ,
> > > "panic-metadata-mem", were the first is for general ETR trace in
> > > non-panic situation and then constrain the "panic-" areas to appear
> together.
> > > The "etr-trace-mem", "panic-trace-mem" could easily point to the
> > > same area.
> > >
> > As noted above, we do not have other generic use case for these reserved
> regions now.
> > Hence two regions/names, panic-trace-mem and panic-metadata-mem
> with
> > constraints kept as
> >  minItems: 2 and maxItems: 2 would suffice ?
> 
> Whatever you do, please delete the -mem suffix.

Ack.




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