[PATCH v3 RESEND 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support

[Robert Foss]

On Mon, 21 Aug 2023 11:39:59 +0800, Liu Ying wrote:
> This series aims to add MIPI DSI support for Freescale i.MX93 SoC.
> 
> There is a Synopsys DesignWare MIPI DSI host controller and a Synopsys
> Designware MIPI DPHY embedded in i.MX93.  Some configurations and
> extensions to them are controlled by i.MX93 media blk-ctrl.
> 
> Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
> bridge helpers and implementing i.MX93 MIPI DSI specific extensions.
> 
> [...]

Applied, thanks!

[1/9] drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ec20c510ee2d
[2/9] drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0de852d4c23a
[3/9] drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=d5116fb29dc0
[4/9] drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=5a67ec8c64ec
[5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ac87d23694f4
[6/9] drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles for HSA and HBP
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=d22e9a6df2db
[7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=743bf594a3b1
[8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=db95a55ccec7
[9/9] drm/bridge: imx: Add i.MX93 MIPI DSI support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ce62f8ea7e3f



Rob