[PATCH 4/5] arm64: zynqmp: Add ZynqnMP nvmem nodes

[Praveen Teja Kundanala]

Add nvmem DT nodes for ZynqMP SOC

Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala at amd.com>
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 02cfcc716936..b8807dcce442 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -190,6 +190,61 @@ nvmem_firmware {
 				soc_revision: soc_revision at 0 {
 					reg = <0x0 0x4>;
 				};
+				/* efuse access */
+				efuse_dna: efuse_dna at c {
+					reg = <0xc 0xc>;
+				};
+				efuse_usr0: efuse_usr0 at 20 {
+					reg = <0x20 0x4>;
+				};
+				efuse_usr1: efuse_usr1 at 24 {
+					reg = <0x24 0x4>;
+				};
+				efuse_usr2: efuse_usr2 at 28 {
+					reg = <0x28 0x4>;
+				};
+				efuse_usr3: efuse_usr3 at 2c {
+					reg = <0x2c 0x4>;
+				};
+				efuse_usr4: efuse_usr4 at 30 {
+					reg = <0x30 0x4>;
+				};
+				efuse_usr5: efuse_usr5 at 34 {
+					reg = <0x34 0x4>;
+				};
+				efuse_usr6: efuse_usr6 at 38 {
+					reg = <0x38 0x4>;
+				};
+				efuse_usr7: efuse_usr7 at 3c {
+					reg = <0x3c 0x4>;
+				};
+				efuse_miscusr: efuse_miscusr at 40 {
+					reg = <0x40 0x4>;
+				};
+				efuse_chash: efuse_chash at 50 {
+					reg = <0x50 0x4>;
+				};
+				efuse_pufmisc: efuse_pufmisc at 54 {
+					reg = <0x54 0x4>;
+				};
+				efuse_sec: efuse_sec at 58 {
+					reg = <0x58 0x4>;
+				};
+				efuse_spkid: efuse_spkid at 5c {
+					reg = <0x5c 0x4>;
+				};
+				efuse_aeskey: efuse_aeskey at 60 {
+					reg = <0x60 0x20>;
+				};
+				efuse_ppk0hash: efuse_ppk0hash at a0 {
+					reg = <0xa0 0x30>;
+				};
+				efuse_ppk1hash: efuse_ppk1hash at d0 {
+					reg = <0xd0 0x30>;
+				};
+				efuse_pufuser: efuse_pufuser at 100 {
+					reg = <0x100 0x7F>;
+				};
 			};
 
 			zynqmp_pcap: pcap {
-- 
2.36.1