[PATCH v2] i2c: stm32f7: Fix PEC handling in case of SMBUS transfers
Andi Shyti
andi.shyti at kernel.org
Thu Oct 12 08:06:16 PDT 2023
Hi Alain,
On Tue, Oct 10, 2023 at 10:44:54AM +0200, Alain Volmat wrote:
> In case of SMBUS byte read with PEC enabled, the whole transfer
> is split into two commands. A first write command, followed by
> a read command. The write command does not have any PEC byte
> and a PEC byte is appended at the end of the read command.
> (cf Read byte protocol with PEC in SMBUS specification)
>
> Within the STM32 I2C controller, handling (either sending
> or receiving) of the PEC byte is done via the PECBYTE bit in
> register CR2.
>
> Currently, the PECBYTE is set at the beginning of a transfer,
> which lead to sending a PEC byte at the end of the write command
> (hence losing the real last byte), and also does not check the
> PEC byte received during the read command.
>
> This patch corrects the function stm32f7_i2c_smbus_xfer_msg
> in order to only set the PECBYTE during the read command.
Thanks for improving the log.
> Fixes: 9e48155f6bfe ("i2c: i2c-stm32f7: Add initial SMBus protocols support")
> Signed-off-by: Alain Volmat <alain.volmat at foss.st.com>
> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret at foss.st.com>
As this is a fix you should have also included and Cc'ed:
Cc: <stable at vger.kernel.org> # v4.18+
No need to resend.
Acked-by: Andi Shyti <andi.shyti at kernel.org>
Thanks,
Andi
More information about the linux-arm-kernel
mailing list