[PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Krzysztof Kozlowski]

On 27/11/2023 00:06, Heiko Stübner wrote:
> Hi Krzysztof,
> 
> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>> On 22/11/2023 13:22, Tim Lunn wrote:
>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>
>>> Signed-off-by: Tim Lunn <tim at feathertop.org>
>>> ---
>>>
>>> (no changes since v1)
>>>
>>>  arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>  arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>  2 files changed, 25 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>  				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>  		};
>>>  	};
>>> +	i2c2 {
>>> +		/omit-if-no-ref/
>>> +		i2c2_xfer: i2c2-xfer {
>>> +			rockchip,pins =
>>> +				/* i2c2_scl */
>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>> +				/* i2c2_sda */
>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>> +		};
>>> +	};
>>>  	pwm2 {
>>>  		/omit-if-no-ref/
>>>  		pwm2m0_pins: pwm2m0-pins {
>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> index 6c5c928f06c7..cf1df75df418 100644
>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> @@ -21,6 +21,7 @@ / {
>>>  
>>>  	aliases {
>>>  		i2c0 = &i2c0;
>>> +		i2c2 = &i2c2;
>>
>> No, this should be per-board to match board labeling/schematics.
> 
> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
> and also all board schematics I've seen so far are very consistent for
> these ... i2c2 for example is labled i2c2 both in the pins in the socs
> and also in the board-schematics using them.
> 
> So while I can agree that things like mmc-aliases might be board-specific,
> I do think aliases for the core busses should be able to live in the soc dtsi
> as for all Rockchip SoCs so far?

If you do not list here all aliases, it is already board-specific, isn't it?

https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/

Best regards,
Krzysztof