[PATCH v2 07/13] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0

Suzuki K Poulose suzuki.poulose at arm.com
Wed Nov 22 06:07:41 PST 2023


On 20/11/2023 12:37, Marc Zyngier wrote:
> A variant of FEAT_E2H0 not being implemented exists in the form of
> HCR_EL2.E2H being RES1 *and* HCR_EL2.NV1 being RES0 (indicating that
> only VHE is supported on the host and nested guests).
> 
> Add the necessary infrastructure for this new CPU capability.
> 
> Signed-off-by: Marc Zyngier <maz at kernel.org>

Reviewed-by: Suzuki K Poulose <suzuki.poulose at arm.com>


> ---
>   arch/arm64/kernel/cpufeature.c | 7 +++++++
>   arch/arm64/tools/cpucaps       | 1 +
>   2 files changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e0d64e8b4851..a733c9a83f83 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2794,6 +2794,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
>   		.matches = has_cpuid_feature,
>   		ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI)
>   	},
> +	{
> +		.desc = "FEAT_E2H0 not implemented (NV1 RES0)",
> +		.capability = ARM64_HCR_NV1_RES0,
> +		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
> +		.matches = has_cpuid_feature,
> +		ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI_NV1)
> +	},
>   	{},
>   };
>   
> diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
> index 8866ea9bf995..fea24bcd6252 100644
> --- a/arch/arm64/tools/cpucaps
> +++ b/arch/arm64/tools/cpucaps
> @@ -53,6 +53,7 @@ HAS_TLB_RANGE
>   HAS_VIRT_HOST_EXTN
>   HAS_WFXT
>   HCR_E2H_RES1
> +HCR_NV1_RES0
>   HW_DBM
>   KVM_HVHE
>   KVM_PROTECTED_MODE




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