[PATCH v2 05/13] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling

[Suzuki K Poulose]

On 20/11/2023 12:37, Marc Zyngier wrote:
> Add ID_AA64MMFR4_EL1 to the list of idregs the kernel knows about,
> and describe the E2H0 field.
> 
> Reviewed-by: Oliver Upton <oliver.upton at linux.dev>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
>   arch/arm64/include/asm/cpu.h   | 1 +
>   arch/arm64/kernel/cpufeature.c | 7 +++++++
>   arch/arm64/kernel/cpuinfo.c    | 1 +
>   3 files changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
> index f3034099fd95..d5ba6ec9f711 100644
> --- a/arch/arm64/include/asm/cpu.h
> +++ b/arch/arm64/include/asm/cpu.h
> @@ -57,6 +57,7 @@ struct cpuinfo_arm64 {
>   	u64		reg_id_aa64mmfr1;
>   	u64		reg_id_aa64mmfr2;
>   	u64		reg_id_aa64mmfr3;
> +	u64		reg_id_aa64mmfr4;
>   	u64		reg_id_aa64pfr0;
>   	u64		reg_id_aa64pfr1;
>   	u64		reg_id_aa64zfr0;
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 767a6f288755..41db7f993eef 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -438,6 +438,11 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = {
>   	ARM64_FTR_END,
>   };
>   
> +static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = {
> +	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0),

It does sound a bit confusing, but FTR_LOWER_SAFE is the correct choice 
for the feature.

Reviewed-by: Suzuki K Poulose <suzuki.poulose at arm.com>


> +	ARM64_FTR_END,
> +};
> +
>   static const struct arm64_ftr_bits ftr_ctr[] = {
>   	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */
>   	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_EL0_DIC_SHIFT, 1, 1),
> @@ -755,6 +760,7 @@ static const struct __ftr_reg_entry {
>   			       &id_aa64mmfr1_override),
>   	ARM64_FTR_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2),
>   	ARM64_FTR_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3),
> +	ARM64_FTR_REG(SYS_ID_AA64MMFR4_EL1, ftr_id_aa64mmfr4),
>   
>   	/* Op1 = 1, CRn = 0, CRm = 0 */
>   	ARM64_FTR_REG(SYS_GMID_EL1, ftr_gmid),
> @@ -1079,6 +1085,7 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info)
>   	init_cpu_ftr_reg(SYS_ID_AA64MMFR1_EL1, info->reg_id_aa64mmfr1);
>   	init_cpu_ftr_reg(SYS_ID_AA64MMFR2_EL1, info->reg_id_aa64mmfr2);
>   	init_cpu_ftr_reg(SYS_ID_AA64MMFR3_EL1, info->reg_id_aa64mmfr3);
> +	init_cpu_ftr_reg(SYS_ID_AA64MMFR4_EL1, info->reg_id_aa64mmfr4);
>   	init_cpu_ftr_reg(SYS_ID_AA64PFR0_EL1, info->reg_id_aa64pfr0);
>   	init_cpu_ftr_reg(SYS_ID_AA64PFR1_EL1, info->reg_id_aa64pfr1);
>   	init_cpu_ftr_reg(SYS_ID_AA64ZFR0_EL1, info->reg_id_aa64zfr0);
> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> index a257da7b56fe..a4205effca46 100644
> --- a/arch/arm64/kernel/cpuinfo.c
> +++ b/arch/arm64/kernel/cpuinfo.c
> @@ -452,6 +452,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
>   	info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
>   	info->reg_id_aa64mmfr2 = read_cpuid(ID_AA64MMFR2_EL1);
>   	info->reg_id_aa64mmfr3 = read_cpuid(ID_AA64MMFR3_EL1);
> +	info->reg_id_aa64mmfr4 = read_cpuid(ID_AA64MMFR4_EL1);
>   	info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
>   	info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);
>   	info->reg_id_aa64zfr0 = read_cpuid(ID_AA64ZFR0_EL1);