[PATCH v2] mtd: rawnand: meson: initialize clock register
Arseniy Krasnov
avkrasnov at salutedevices.com
Sun Nov 19 22:42:39 PST 2023
Clock register must be also initialized during controller probing. If
this is not performed (for example by bootloader before) - controller
will not work.
Signed-off-by: Arseniy Krasnov <avkrasnov at salutedevices.com>
---
Changelog:
v1 -> v2:
* Change 'CLK_ENABLE_VALUE' -> 'CLK_SELECT_FIX_PLL2': '0x245' -> 'BIT(6)'
according doc.
drivers/mtd/nand/raw/meson_nand.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 0d4d358152d7..f8bb40e486e4 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -91,6 +91,8 @@
/* eMMC clock register, misc control */
#define CLK_SELECT_NAND BIT(31)
+#define CLK_ALWAYS_ON_NAND BIT(24)
+#define CLK_SELECT_FIX_PLL2 BIT(6)
#define NFC_CLK_CYCLE 6
@@ -1152,7 +1154,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ writel(CLK_ALWAYS_ON_NAND | CLK_SELECT_NAND | CLK_SELECT_FIX_PLL2,
nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);
--
2.35.0
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