[PATCH 5/5] pwm: stm32: Fix enable count for clk in .probe()

Fabrice Gasnier fabrice.gasnier at foss.st.com
Thu Nov 16 07:05:04 PST 2023


On 11/15/23 22:01, Uwe Kleine-König wrote:
> Hello Fabrice,
> 
> On Wed, Nov 15, 2023 at 10:02:20AM +0100, Fabrice Gasnier wrote:
>> (with or without a Fixes tag) Could you add a check on global counter
>> enable bit (TIM_CR1_CEN) both in the .get_state(), and in the
>> stm32_pwm_detect_channels(), that counts the num_enabled channels ?
> 
> I'd address that separately, mostly because the patches forwarded here
> are not mine.

Ok, let's go this way.

> 
>> In case the TIM_CR1_CEN isn't set (but some of the TIM_CCER_CCXE are),
>> the driver will report enabled channels. But physically, the pwm output
>> will be inactive.
> 
> Huuu, that means if channel #0 is running and I start a capture on
> channel #1 which results in unconditionally calling
> regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); (in
> stm32_pwm_raw_capture()) channel #0 stops to toggle!

Basically no, please find my answers sent separately on "[PATCH] pwm:
stm32: Mark capture support as broken"

> 
>> That's more a robustness case... depending on what's been done possibly
>> by bootloader. What to you think ?
> 
> I would assume that a bootloader that sets the CCXE bits also enables
> TIM_CR1_CEN and so in practise Philipp's patch is fine. But I agree that
> doing things properly would be better.

ok, thanks,
Best Regards,
Fabrice
> 
> Best regards
> Uwe
> 



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