[PATCH v10 4/5] drivers/perf: add DesignWare PCIe PMU driver

[Shuai Xue]

On 2023/11/15 08:07, Ilkka Koskinen wrote:
> 
> Hi Shuai,
> 
> On Sat, 4 Nov 2023, Shuai Xue wrote:
>> This commit adds the PCIe Performance Monitoring Unit (PMU) driver support
>> for T-Head Yitian SoC chip. Yitian is based on the Synopsys PCI Express
>> Core controller IP which provides statistics feature. The PMU is a PCIe
>> configuration space register block provided by each PCIe Root Port in a
>> Vendor-Specific Extended Capability named RAS D.E.S (Debug, Error
>> injection, and Statistics).
>>
>> To facilitate collection of statistics the controller provides the
>> following two features for each Root Port:
>>
>> - one 64-bit counter for Time Based Analysis (RX/TX data throughput and
>>  time spent in each low-power LTSSM state) and
>> - one 32-bit counter for Event Counting (error and non-error events for
>>  a specified lane)
>>
>> Note: There is no interrupt for counter overflow.
>>
>> This driver adds PMU devices for each PCIe Root Port. And the PMU device is
>> named based the BDF of Root Port. For example,
>>
>>    30:03.0 PCI bridge: Device 1ded:8000 (rev 01)
>>
>> the PMU device name for this Root Port is dwc_rootport_3018.
>>
>> Example usage of counting PCIe RX TLP data payload (Units of bytes)::
>>
>>    $# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/
>>
>> average RX bandwidth can be calculated like this:
>>
>>    PCIe TX Bandwidth = Rx_PCIe_TLP_Data_Payload / Measure_Time_Window
>>
>> Signed-off-by: Shuai Xue <xueshuai at linux.alibaba.com>
>> Reviewed-by: Baolin Wang <baolin.wang at linux.alibaba.com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron at huawei.com>
>> Reviewed-by: Yicong Yang <yangyicong at hisilicon.com>
> 
> Thanks for the driver! I finally found some time to test your driver on AmpereOne and it seemed to work fine. 

Glad to hear that. Could you please explicitly give me you tested-by tag? I could add it in next version.

I had to do a couple of changes though such as adding Ampere vendor ID and support multiple PCIe domains. Given your driver is already in v10 and you have got quite a few reviewed and acked bys, I wonder if it's better to add my changes to your patches or me to create new patches on top of yours? I'm fine with either. Any thoughts?

I prefer new separate patches, so that we can review them in a new loop.

> 
> Cheers, Ilkka

Best Regard,
Shuai