[PATCH 2/3] thermal: qoriq_thermal: only enable supported sensors
Peng Fan
peng.fan at nxp.com
Wed May 31 05:05:09 PDT 2023
> Subject: Re: [PATCH 2/3] thermal: qoriq_thermal: only enable supported
> sensors
>
> On 16/05/2023 10:37, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan at nxp.com>
> >
> > There are MAX 16 sensors, but not all of them supported. Such as
> > i.MX8MQ, there are only 3 sensors. Enabling all 16 sensors will touch
> > reserved bits from i.MX8MQ reference mannual, and TMU will stuck,
> > temperature will not update anymore.
> >
> > Fixes: 45038e03d633 ("thermal: qoriq: Enable all sensors before
> > registering them")
> > Signed-off-by: Peng Fan <peng.fan at nxp.com>
> > ---
> > drivers/thermal/qoriq_thermal.c | 30 +++++++++++++++++++-----------
> > 1 file changed, 19 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/thermal/qoriq_thermal.c
> > b/drivers/thermal/qoriq_thermal.c index b806a0929459..53748c4a5be1
> > 100644
> > --- a/drivers/thermal/qoriq_thermal.c
> > +++ b/drivers/thermal/qoriq_thermal.c
> > @@ -31,7 +31,6 @@
> > #define TMR_DISABLE 0x0
> > #define TMR_ME 0x80000000
> > #define TMR_ALPF 0x0c000000
> > -#define TMR_MSITE_ALL GENMASK(15, 0)
> >
> > #define REGS_TMTMIR 0x008 /* Temperature measurement
> interval Register */
> > #define TMTMIR_DEFAULT 0x0000000f
> > @@ -105,6 +104,11 @@ static int tmu_get_temp(struct
> thermal_zone_device *tz, int *temp)
> > * within sensor range. TEMP is an 9 bit value representing
> > * temperature in KelVin.
> > */
> > +
> > + regmap_read(qdata->regmap, REGS_TMR, &val);
> > + if (!(val & TMR_ME))
> > + return -EAGAIN;
>
> How is this change related to what is described in the changelog?
devm_thermal_zone_of_sensor_register will invoke get temp,
since we reverted the 45038e03d633 did, we need to check TMR_ME
to avoid return invalid temperature.
Regards,
Peng.
>
> > if (regmap_read_poll_timeout(qdata->regmap,
> > REGS_TRITSR(qsensor->id),
> > val,
> > @@ -128,15 +132,7 @@ static const struct thermal_zone_device_ops
> tmu_tz_ops = {
> > static int qoriq_tmu_register_tmu_zone(struct device *dev,
> > struct qoriq_tmu_data *qdata)
> > {
> > - int id;
> > -
> > - if (qdata->ver == TMU_VER1) {
> > - regmap_write(qdata->regmap, REGS_TMR,
> > - TMR_MSITE_ALL | TMR_ME | TMR_ALPF);
> > - } else {
> > - regmap_write(qdata->regmap, REGS_V2_TMSR,
> TMR_MSITE_ALL);
> > - regmap_write(qdata->regmap, REGS_TMR, TMR_ME |
> TMR_ALPF_V2);
> > - }
> > + int id, sites = 0;
> >
> > for (id = 0; id < SITES_MAX; id++) {
> > struct thermal_zone_device *tzd;
> > @@ -153,14 +149,26 @@ static int qoriq_tmu_register_tmu_zone(struct
> device *dev,
> > if (ret == -ENODEV)
> > continue;
> >
> > - regmap_write(qdata->regmap, REGS_TMR,
> TMR_DISABLE);
> > return ret;
> > }
> >
> > + if (qdata->ver == TMU_VER1)
> > + sites |= 0x1 << (15 - id);
> > + else
> > + sites |= 0x1 << id;
> > +
> > if (devm_thermal_add_hwmon_sysfs(dev, tzd))
> > dev_warn(dev,
> > "Failed to add hwmon sysfs attributes\n");
> > + }
> >
> > + if (sites) {
> > + if (qdata->ver == TMU_VER1) {
> > + regmap_write(qdata->regmap, REGS_TMR,
> TMR_ME | TMR_ALPF | sites);
> > + } else {
> > + regmap_write(qdata->regmap, REGS_V2_TMSR,
> sites);
> > + regmap_write(qdata->regmap, REGS_TMR,
> TMR_ME | TMR_ALPF_V2);
> > + }
> > }
> >
> > return 0;
>
> --
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fww
> w.linaro.org%2F&data=05%7C01%7Cpeng.fan%40nxp.com%7C032080272b
> b84255c00b08db61c6a962%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%
> 7C0%7C638211278103002380%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC
> 4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000
> %7C%7C%7C&sdata=OBOfWzY2%2BAZDHWoiqwsdShvt0P6o3JYhSCmlz9wN
> Wzc%3D&reserved=0> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro:
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fww
> w.facebook.com%2Fpages%2FLinaro&data=05%7C01%7Cpeng.fan%40nxp.c
> om%7C032080272bb84255c00b08db61c6a962%7C686ea1d3bc2b4c6fa92cd
> 99c5c301635%7C0%7C0%7C638211278103002380%7CUnknown%7CTWFpb
> GZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI
> 6Mn0%3D%7C3000%7C%7C%7C&sdata=PBMinw85VAW%2BvLnNtNnxui1e7
> kqJioymsokTrRRoB5c%3D&reserved=0> Facebook |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitt
> er.com%2F%23!%2Flinaroorg&data=05%7C01%7Cpeng.fan%40nxp.com%7C
> 032080272bb84255c00b08db61c6a962%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C0%7C638211278103002380%7CUnknown%7CTWFpbGZsb3d8
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%7C3000%7C%7C%7C&sdata=Grd5C5p1cwjl6kwHUfhCFVwFMOhZjedAm5
> UnPoU5%2FUU%3D&reserved=0> Twitter |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fww
> w.linaro.org%2Flinaro-
> blog%2F&data=05%7C01%7Cpeng.fan%40nxp.com%7C032080272bb84255c
> 00b08db61c6a962%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
> 638211278103002380%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C
> %7C&sdata=jWOAT8Eg0AzCePPrAsNtY%2FdZzNs2kvY2kGp8uO4I7a8%3D&re
> served=0> Blog
More information about the linux-arm-kernel
mailing list