[PATCH V3] soc: imx: support i.MX93 soc device

[Peng Fan]

Hi Shawn,

> Subject: Re: [PATCH V3] soc: imx: support i.MX93 soc device
> 
> On Wed, May 24, 2023 at 03:30:01PM +0200, Rasmus Villemoes wrote:
> > On 15/05/2023 08.37, Peng Fan (OSS) wrote:
> > > From: Peng Fan <peng.fan at nxp.com>
> > >
> > > i.MX93 Device Unique ID(UID) is in eFuse that could be read through
> > > OCOTP Fuse Shadow Block. i.MX93 UID is 128 bits long, so introduce
> > > soc_uid_high to indicate the higher 64bits.
> >
> > So apparently, the imx8mp also has 128 bits, at least according to the
> > reference manual, which mentions a "UNIQUE_ID[127:64]" at offset 0xe00
> > -
> > 0xe10 (i.e. bank 40, words 0 and 1).
> >
> > However, no further mention of these upper bits can be found anywhere
> > in the RM, or in linux or u-boot, mainline or downstream NXP.
> > Furthermore, quick experiments on both an imx8mp-evk and a custom
> > imx8mp board reveals that those words are not locked down (they do
> > seem to have some contents from the factory, but I can still set more bits
> in them).
> >
> > Could someone from NXP please explain what exactly bank 40, words 0
> > and 1, on imx8mp are for? What do their initial value mean, why are
> > they not locked down, and why does the RM indicate that they should be
> > part of a unique_id?
> >
> > Also, assuming that the RM is just wrong (wouldn't be the first time;
> > the description of the lower 64 bits is also wonky in its own special
> > way), an obvious follow-up question is: Are the currently exposed
> > (lower) 64 bits unique among all imx8mp SOCs, i.e. does those 64 bits
> > by themselves actually work as a uid?
> 
> Rasmus,
> 
> Are you fine with the patch itself?  Or do you expect more clarification in the
> commit log?

Rasmus's comments is for i.MX8MP, this patch is for i.MX93.
But anyway I just sent out V4 patch to address i.MX8MP support and
then add i.MX93 support.

Thanks,
Peng.

> 
> Shawn