[PATCH v2] arm64: dts: imx8mp: Enable SAI audio on MX8MP DHCOM PDK2 and PDK3
Marek Vasut
marex at denx.de
Sat May 27 03:22:33 PDT 2023
Add SAI I2S and audio bindings on MX8MP DHCOM PDK2 and PDK3.
The VDDA is supplied from on-carrier-board regulator, the VDDIO
is supplied from always-on on-SoM regulator. Except for different
I2C bus used to connect the codec, the implementation is virtually
identical on both carrier boards.
Align regulator-avdd name to regulator-3p3vdd on PDK3, since this
is the VDDA supply and it is the same on both carrier boards.
Signed-off-by: Marek Vasut <marex at denx.de>
---
Cc: Conor Dooley <conor+dt at kernel.org>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
Cc: NXP Linux Team <linux-imx at nxp.com>
Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
Cc: Rob Herring <robh+dt at kernel.org>
Cc: Sascha Hauer <s.hauer at pengutronix.de>
Cc: Shawn Guo <shawnguo at kernel.org>
Cc: devicetree at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
---
V2: Move compatible on top of clock-codec properties list
---
.../boot/dts/freescale/imx8mp-dhcom-pdk2.dts | 54 +++++++++++++++++++
.../boot/dts/freescale/imx8mp-dhcom-pdk3.dts | 47 +++++++++++++++-
.../boot/dts/freescale/imx8mp-dhcom-som.dtsi | 17 ++++++
3 files changed, 116 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
index 92df6c1277c36..e9fb5f7f39b50 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
@@ -23,6 +23,12 @@ chosen {
stdout-path = &uart1;
};
+ clk_ext_audio_codec: clock-codec {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
@@ -102,6 +108,43 @@ led-3 {
pinctrl-names = "default";
};
};
+
+ reg_3p3vdd: regulator-3p3vdd { /* 3.3VDD */
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "3P3VDD";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SGTL5000-Card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,widgets = "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Headphone Jack", "HP_OUT";
+
+ cpu_dai: simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+
+ codec_dai: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
+ };
+};
+
+&i2c5 {
+ sgtl5000: codec at a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ #sound-dai-cells = <0>;
+ clocks = <&clk_ext_audio_codec>;
+ VDDA-supply = <®_3p3vdd>;
+ VDDIO-supply = <®_vdd_3p3v_awo>;
+ };
};
&fec { /* Second ethernet */
@@ -155,6 +198,17 @@ &pcie {
status = "okay";
};
+&sai3 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai3>;
+ assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
&usb3_1 {
fsl,over-current-active-low;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
index 24dc58b3404fb..31d85d5871c91 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
@@ -23,6 +23,12 @@ chosen {
stdout-path = &uart1;
};
+ clk_ext_audio_codec: clock-codec {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
clk_xtal25: clock-xtal25 {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -140,12 +146,30 @@ led-3 {
};
};
- reg_avdd: regulator-avdd { /* AUDIO_VDD */
+ reg_3p3vdd: regulator-3p3vdd { /* 3.3VDD */
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- regulator-name = "AUDIO_VDD";
+ regulator-name = "3P3VDD";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SGTL5000-Card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,widgets = "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Headphone Jack", "HP_OUT";
+
+ cpu_dai: simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+
+ codec_dai: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
};
};
@@ -161,6 +185,15 @@ i2cmuxed0: i2c at 0 {
#size-cells = <0>;
reg = <0>;
+ sgtl5000: codec at a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ #sound-dai-cells = <0>;
+ clocks = <&clk_ext_audio_codec>;
+ VDDA-supply = <®_3p3vdd>;
+ VDDIO-supply = <®_vdd_3p3v_awo>;
+ };
+
typec at 3d {
compatible = "nxp,ptn5150";
reg = <0x3d>;
@@ -263,6 +296,16 @@ &pcie {
status = "okay";
};
+&sai3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai3>;
+ assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
&usb_dwc3_0 {
usb-role-switch;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index 7e804f6507843..98a11c31d7d45 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -49,6 +49,14 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
startup-delay-us = <100>;
vin-supply = <&buck4>;
};
+
+ reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "VDD_3P3V_AWO";
+ };
};
&A53_0 {
@@ -863,6 +871,15 @@ MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x40000080
>;
};
+ pinctrl_sai3: dhcom-sai3-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
+ MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
+ MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
+ >;
+ };
+
pinctrl_touch: dhcom-touch-grp {
fsl,pins = <
/* #TOUCH_INT */
--
2.39.2
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