[PATCH] arm64: dts: imx8mp: Add TC9595 bridge on DH electronics i.MX8M Plus DHCOM

[Marek Vasut]

On 5/24/23 12:24, Alexander Stein wrote:

Hi,

>>> Looking at the AUX_CH+/- signals, I can see the native aux request and the
>>> (presumable) correct answer (DP_DPCD_REV register) from the display. But
>>> for some reason the bridge runs into a aux timeout.
>>> I can see in the DP0_AUXSTATUS register the bus gets busy (0x1) after
>>> starting transfer. But after the tc_aux_wait_busy() call DP0_AUXSTATUS
>>> his indicating a timeout and sync error (0x310002).
>>> When changing the "Aux Bit Period Calculator Threshold" to 5 (register
>>> AUXCFG1), the sync error is gone, but the timeout still happens.
>>>
>>> The frequency used from the display is ~1MHz, which should be okay. So on
>>> the electrical side all seems okay, but the native aux transfer don't
>>> work.
>> I recall DPCD read timeouts, but those were usually triggered by either
>> bad clock or wiring problems (the devkit wiring I used was horrible at
>> the beginning) from what I can recall.
> 
> bad clock in the sense of badly configured or bad xtal hardware?

As in, the xtal clock drives the internal PLLs and if those are 
misconfigured for whatever reason, the chip can misbehave. You might 
want to double-check the clock routing chapter in the toshiba bridge 
datasheet and matching registers.

Have you tried forcing the chip into 1.62G (instead of 2.7G) operation 
and into 1-lane DP instead of 2-lane DP mode ? Does that make any 
difference ?

> As the bridge
> and the xtal is on the same mainboard, for now, I ignore wirings.

OK