[PATCH v2 2/2] clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocks

[Alexandre Mergnat]

On 16/05/2023 15:52, AngeloGioacchino Del Regno wrote:
> Various MSDC core clocks, used for multiple MSDC controller instances,
> share the same parent(s): in order to add parents selection in the
> mtk-sd driver to achieve an accurate clock rate for all modes, remove
> the CLK_SET_RATE_PARENT flag from all MSDC clocks for all SoCs: this
> will make sure that a clk_set_rate() call performed for a clock on
> a secondary controller will not change the rate of a common parent,
> which would result in an overclock or underclock of one of the
> controllers.
> 
> Signed-off-by: AngeloGioacchino Del Regno<angelogioacchino.delregno at collabora.com>
> Reviewed-by: Matthias Brugger<matthias.bgg at gmail.com>
> Reviewed-by: Markus Schneider-Pargmann<msp at baylibre.com>

Tested on mt8365-evk board.

Reviewed-by: Alexandre Mergnat <amergnat at baylibre.com>
Tested-by: Alexandre Mergnat <amergnat at baylibre.com>