[PATCH 6/8] arm64: dts: qcom: Add support for GCC and RPMHCC for SDX75
Rohit Agarwal
quic_rohiagar at quicinc.com
Fri May 19 02:09:08 PDT 2023
From: Imran Shaik <quic_imrashai at quicinc.com>
Add support for GCC and RPMHCC clock nodes for SDX75 platform.
Signed-off-by: Imran Shaik <quic_imrashai at quicinc.com>
Signed-off-by: Rohit Agarwal <quic_rohiagar at quicinc.com>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index c2b8810..dbbd2f4 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -7,6 +7,7 @@
*/
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sdx75-gcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -23,7 +24,21 @@
reg = <0 0 0 0>;
};
- clocks { };
+ clocks {
+ xo_board: xo_board {
+ compatible = "fixed-clock";
+ clock-frequency = <76800000>;
+ clock-output-names = "xo_board";
+ #clock-cells = <0>;
+ };
+
+ sleep_clk: sleep_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <32000>;
+ clock-output-names = "sleep_clk";
+ #clock-cells = <0>;
+ };
+ };
cpus {
#address-cells = <2>;
@@ -358,6 +373,18 @@
ranges;
compatible = "simple-bus";
+ gcc: clock-controller at 80000 {
+ compatible = "qcom,sdx75-gcc";
+ reg = <0x0 0x0080000 0x0 0x1f7400>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>;
+ clock-names = "bi_tcxo",
+ "sleep_clk";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
tcsr_mutex: hwlock at 1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -520,6 +547,14 @@
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
+
+ rpmhcc: clock-controller {
+ compatible = "qcom,sdx75-rpmh-clk";
+ clocks = <&xo_board>;
+ clock-names = "xo";
+ #clock-cells = <1>;
+ };
+
};
};
--
2.7.4
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