[PATCH net-next V3 1/3] dt-bindings: net: xilinx_axienet: Introduce dmaengine binding support

[Gaddam, Sarath Babu Naidu]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> Sent: Friday, May 12, 2023 11:57 AM
> To: Gaddam, Sarath Babu Naidu
> <sarath.babu.naidu.gaddam at amd.com>; davem at davemloft.net;
> edumazet at google.com; kuba at kernel.org; pabeni at redhat.com;
> robh+dt at kernel.org; krzysztof.kozlowski+dt at linaro.org
> Cc: linux at armlinux.org.uk; Simek, Michal <michal.simek at amd.com>;
> Pandey, Radhey Shyam <radhey.shyam.pandey at amd.com>;
> netdev at vger.kernel.org; devicetree at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; linux-kernel at vger.kernel.org; Sarangi,
> Anirudha <anirudha.sarangi at amd.com>; Katakam, Harini
> <harini.katakam at amd.com>; git (AMD-Xilinx) <git at amd.com>
> Subject: Re: [PATCH net-next V3 1/3] dt-bindings: net: xilinx_axienet:
> Introduce dmaengine binding support
> 
> On 11/05/2023 13:32, Gaddam, Sarath Babu Naidu wrote:
> >
> >
> >> -----Original Message-----
> >> From: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> >> Sent: Wednesday, May 10, 2023 3:39 PM
> >> To: Gaddam, Sarath Babu Naidu
> >> <sarath.babu.naidu.gaddam at amd.com>; davem at davemloft.net;
> >> edumazet at google.com; kuba at kernel.org; pabeni at redhat.com;
> >> robh+dt at kernel.org; krzysztof.kozlowski+dt at linaro.org
> >> Cc: linux at armlinux.org.uk; Simek, Michal <michal.simek at amd.com>;
> >> Pandey, Radhey Shyam <radhey.shyam.pandey at amd.com>;
> >> netdev at vger.kernel.org; devicetree at vger.kernel.org; linux-arm-
> >> kernel at lists.infradead.org; linux-kernel at vger.kernel.org; Sarangi,
> >> Anirudha <anirudha.sarangi at amd.com>; Katakam, Harini
> >> <harini.katakam at amd.com>; git (AMD-Xilinx) <git at amd.com>
> >> Subject: Re: [PATCH net-next V3 1/3] dt-bindings: net: xilinx_axienet:
> >> Introduce dmaengine binding support
> >>
> >> On 10/05/2023 10:50, Sarath Babu Naidu Gaddam wrote:
> >>> From: Radhey Shyam Pandey <radhey.shyam.pandey at xilinx.com>
> >>>
> >>> The axiethernet driver will use dmaengine framework to communicate
> >>> with dma controller IP instead of built-in dma programming sequence.
> >>
> >> Subject: drop second/last, redundant "bindings". The "dt-bindings"
> >> prefix is already stating that these are bindings.
> >>
> >> Actually also drop "dmaenging" as it is Linuxism. Focus on hardware,
> e.g.
> >> "Add DMA support".
> >>
> >>>
> >>> To request dma transmit and receive channels the axiethernet driver
> >>> uses generic dmas, dma-names properties.
> >>>
> >>> Also to support the backward compatibility, use "dmas" property to
> >>> identify as it should use dmaengine framework or legacy
> >>> driver(built-in dma programming).
> >>>
> >>> At this point it is recommended to use dmaengine framework but it's
> >>> optional. Once the solution is stable will make dmas as required
> >>> properties.
> >>>
> >>> Signed-off-by: Radhey Shyam Pandey
> >> <radhey.shyam.pandey at xilinx.com>
> >>> Signed-off-by: Sarath Babu Naidu Gaddam
> >>> <sarath.babu.naidu.gaddam at amd.com>
> >>> ---
> >>> These changes are on top of below txt to yaml conversion discussion
> >>> https://lore.kernel.org/all/20230308061223.1358637-1-
> >> sarath.babu.naidu
> >>> .gaddam at amd.com/#Z2e.:20230308061223.1358637-1-
> >> sarath.babu.naidu.gadda
> >>> m::40amd.com:1bindings:net:xlnx::2caxi-ethernet.yaml
> >>>
> >>> Changes in V3:
> >>> 1) Reverted reg and interrupts property to  support backward
> >> compatibility.
> >>> 2) Moved dmas and dma-names properties from Required properties.
> >>>
> >>> Changes in V2:
> >>> - None.
> >>> ---
> >>>  .../devicetree/bindings/net/xlnx,axi-ethernet.yaml   | 12
> >> ++++++++++++
> >>>  1 file changed, 12 insertions(+)
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> >>> b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> >>> index 80843c177029..9dfa1976e260 100644
> >>> --- a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> >>> +++ b/Documentation/devicetree/bindings/net/xlnx,axi-
> ethernet.yaml
> >>> @@ -122,6 +122,16 @@ properties:
> >>>        modes, where "pcs-handle" should be used to point to the
> >>> PCS/PMA
> >> PHY,
> >>>        and "phy-handle" should point to an external PHY if exists.
> >>>
> >>> +  dmas:
> >>> +    items:
> >>> +      - description: TX DMA Channel phandle and DMA request line
> >> number
> >>> +      - description: RX DMA Channel phandle and DMA request line
> >>> + number
> >>> +
> >>> +  dma-names:
> >>> +    items:
> >>> +      - const: tx_chan0
> >>
> >> tx
> >>
> >>> +      - const: rx_chan0
> >>
> >> rx
> >
> > We want to support more channels in the future, currently we support
> > AXI DMA which has only one tx and rx channel. In future we want to
> > extend support for multichannel DMA (MCDMA) which has 16 TX and
> > 16 RX channels. To uniquely identify each channel, we are using chan
> > suffix. Depending on the usecase AXI ethernet driver can request any
> > combination of multichannel DMA  channels.
> >
> > dma-names = tx_chan0, tx_chan1, rx_chan0, rx_chan1;
> >
> > will update the commit message with same.
> 
> I expect the binding to be complete, otherwise you get comments like this.
> Add missing parts to the binding and resend.

Binding is complete for current supported DMA (single channel).  We will
extend when we add MCDMA.

We will describe the reason for using channel suffix in the description as 
below. 

   dma-names:
      items:
        - const: tx_chan0
        - const: rx_chan0
     description: |
           Chan suffix is used for identifying each channel uniquely.
           Current DMA has only one Tx and Rx channel but it will be 
           extended to support for multichannel DMA (MCDMA) which
           has 16 TX and 16 RX channels. Depending on the usecase AXI
           ethernet driver can request any combination of multichannel
           DMA  channels.

Thanks,
Sarath