[PATCH 02/23] arm64: zynqmp: Fix usb node drive strength and slew rate

Michal Simek michal.simek at amd.com
Tue May 16 06:30:25 PDT 2023


Hi Laurent

On 5/10/23 08:54, Laurent Pinchart wrote:
> Hi Michal,
> 
> Thank you for the patch.
> 
> On Tue, May 02, 2023 at 03:35:30PM +0200, Michal Simek wrote:
>> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
>>
>> As per design, all input/rx pins should have fast slew rate and 12mA
>> drive strength.
> 
> Why does the slow rate and drive strength matter for input pins ?

In design tools all inputs pins are setup like described by default.
That's why it could suggest that there is no need to describe default 
configuration in DT.
But all MIOs can be used as GPIOs where pinctrl can change their default values 
to something else. That's why setting up default values is to be safe even for 
input pins. I don't know HW details to that extend but that values can also 
change input behavior that's why having default is not a bad idea.

Maybe make sense to extend commit message to describe it better.

Thanks,
Michal




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