[PATCH 1/2] dt-bindings: Add optional gpio property to uartps node to support rs485

Michal Simek michal.simek at amd.com
Tue May 2 03:57:22 PDT 2023



On 5/2/23 12:19, Krzysztof Kozlowski wrote:
> On 02/05/2023 12:14, Guntupalli, Manikanta wrote:
>> Hi Rob Herring,
>>
>>> -----Original Message-----
>>> From: Rob Herring <robh at kernel.org>
>>> Sent: Thursday, April 27, 2023 10:14 PM
>>> To: Guntupalli, Manikanta <manikanta.guntupalli at amd.com>
>>> Cc: gregkh at linuxfoundation.org; krzysztof.kozlowski+dt at linaro.org;
>>> michal.simek at xilinx.com; linux-serial at vger.kernel.org;
>>> devicetree at vger.kernel.org; linux-kernel at vger.kernel.org;
>>> jirislaby at kernel.org; linux-arm-kernel at lists.infradead.org; Simek, Michal
>>> <michal.simek at amd.com>; git (AMD-Xilinx) <git at amd.com>; Pandey,
>>> Radhey Shyam <radhey.shyam.pandey at amd.com>; Datta, Shubhrajyoti
>>> <shubhrajyoti.datta at amd.com>; Goud, Srinivas <srinivas.goud at amd.com>;
>>> manion05gk at gmail.com
>>> Subject: Re: [PATCH 1/2] dt-bindings: Add optional gpio property to uartps
>>> node to support rs485
>>>
>>> On Wed, Apr 26, 2023 at 05:59:46PM +0530, Manikanta Guntupalli wrote:
>>>> Add optional gpio property to uartps node and add reference to rs485.yaml
>>>
>>> The diff tells me that already. Why?
>> Please check Figure 11-3 (Page number 37) in the below mentioned data sheet, It shows PMOD (ISOW14x2) devices used in half duplex configuration. Driver outputs Y and Z are shorted to A and B respectively. This reduces overall cabling requirements. Also DE/RE are shorted to each other, and at a time, any node acts as either a driver or a receiver.
>> Using above optional GPIO controlling driver or a receiver. This GPIO is optional because it is not required for uart console node.
>>
>> Here,
>> DE - Driver enable. If pin is floating, driver is disabled (internal pull-down resistor)
>> RE - Receiver enable. If pin is floating, receiver buffer is disabled (internal pull-up resistor)
>>
>> Datasheet:
>> https://www.ti.com/lit/ds/symlink/isow1432.pdf?ts=1682607122706&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FISOW1432%252Fpart-details%252FISOW1432DFMR%253FkeyMatch%253DISOW1432DFMR%2526tisearch%253Dsearch-everything%2526usecase%253DOPN
> 
> Your request for us to get into some datasheet somewhere, to get the
> answer to the basic question, is not reasonable. Commit must justify its
> existence, not some external source.

Not really. Manual itself just shows picture of that connection if you are 
interested.
On schematics it looks like that DE and /RE are just handle via one gpio. That's 
why you need 3 wires instead of 4. Definitely it should be described better.

My concern was more about choosing proper name for this functionality.

Thanks,
Michal






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