[PATCH 5/5] soc: apple: mailbox: Rename config symbol to APPLE_MAILBOX
kernel test robot
lkp at intel.com
Tue Mar 28 22:42:47 PDT 2023
Hi Hector,
I love your patch! Yet something to improve:
[auto build test ERROR on bdfe6de2695c5bccc663a5a7d530f81925d8bc10]
url: https://github.com/intel-lab-lkp/linux/commits/Hector-Martin/soc-apple-rtkit-Get-rid-of-apple_rtkit_send_message_wait/20230328-211648
base: bdfe6de2695c5bccc663a5a7d530f81925d8bc10
patch link: https://lore.kernel.org/r/20230328-soc-mailbox-v1-5-3953814532fd%40marcan.st
patch subject: [PATCH 5/5] soc: apple: mailbox: Rename config symbol to APPLE_MAILBOX
config: ia64-allmodconfig (https://download.01.org/0day-ci/archive/20230329/202303291348.nYR9dkeW-lkp@intel.com/config)
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/d0addf95095d935cdd5940101fbf1b1594b08158
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Hector-Martin/soc-apple-rtkit-Get-rid-of-apple_rtkit_send_message_wait/20230328-211648
git checkout d0addf95095d935cdd5940101fbf1b1594b08158
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/soc/apple/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp at intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303291348.nYR9dkeW-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/soc/apple/mailbox.c: In function 'apple_mbox_send':
>> drivers/soc/apple/mailbox.c:151:24: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
151 | writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg.msg1),
| ^~~~~~~~~~
drivers/soc/apple/mailbox.c: In function 'apple_mbox_poll_locked':
>> drivers/soc/apple/mailbox.c:188:28: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
188 | msg.msg1 = FIELD_GET(
| ^~~~~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_PREP +151 drivers/soc/apple/mailbox.c
8b654b5034baba0 Hector Martin 2023-03-28 95
8b654b5034baba0 Hector Martin 2023-03-28 96 int apple_mbox_send(struct apple_mbox *mbox, const struct apple_mbox_msg msg,
8b654b5034baba0 Hector Martin 2023-03-28 97 bool atomic)
8b654b5034baba0 Hector Martin 2023-03-28 98 {
8b654b5034baba0 Hector Martin 2023-03-28 99 unsigned long flags;
8b654b5034baba0 Hector Martin 2023-03-28 100 int ret;
8b654b5034baba0 Hector Martin 2023-03-28 101 u32 mbox_ctrl;
8b654b5034baba0 Hector Martin 2023-03-28 102 long t;
8b654b5034baba0 Hector Martin 2023-03-28 103
8b654b5034baba0 Hector Martin 2023-03-28 104 spin_lock_irqsave(&mbox->tx_lock, flags);
8b654b5034baba0 Hector Martin 2023-03-28 105 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
8b654b5034baba0 Hector Martin 2023-03-28 106
8b654b5034baba0 Hector Martin 2023-03-28 107 while (mbox_ctrl & mbox->hw->control_full) {
8b654b5034baba0 Hector Martin 2023-03-28 108 if (atomic) {
8b654b5034baba0 Hector Martin 2023-03-28 109 ret = readl_poll_timeout_atomic(
8b654b5034baba0 Hector Martin 2023-03-28 110 mbox->regs + mbox->hw->a2i_control, mbox_ctrl,
8b654b5034baba0 Hector Martin 2023-03-28 111 !(mbox_ctrl & mbox->hw->control_full), 100,
8b654b5034baba0 Hector Martin 2023-03-28 112 APPLE_MBOX_TX_TIMEOUT * 1000);
8b654b5034baba0 Hector Martin 2023-03-28 113
8b654b5034baba0 Hector Martin 2023-03-28 114 if (ret) {
8b654b5034baba0 Hector Martin 2023-03-28 115 spin_unlock_irqrestore(&mbox->tx_lock, flags);
8b654b5034baba0 Hector Martin 2023-03-28 116 return ret;
8b654b5034baba0 Hector Martin 2023-03-28 117 }
8b654b5034baba0 Hector Martin 2023-03-28 118
8b654b5034baba0 Hector Martin 2023-03-28 119 break;
8b654b5034baba0 Hector Martin 2023-03-28 120 }
8b654b5034baba0 Hector Martin 2023-03-28 121 /*
8b654b5034baba0 Hector Martin 2023-03-28 122 * The interrupt is level triggered and will keep firing as long as the
8b654b5034baba0 Hector Martin 2023-03-28 123 * FIFO is empty. It will also keep firing if the FIFO was empty
8b654b5034baba0 Hector Martin 2023-03-28 124 * at any point in the past until it has been acknowledged at the
8b654b5034baba0 Hector Martin 2023-03-28 125 * mailbox level. By acknowledging it here we can ensure that we will
8b654b5034baba0 Hector Martin 2023-03-28 126 * only get the interrupt once the FIFO has been cleared again.
8b654b5034baba0 Hector Martin 2023-03-28 127 * If the FIFO is already empty before the ack it will fire again
8b654b5034baba0 Hector Martin 2023-03-28 128 * immediately after the ack.
8b654b5034baba0 Hector Martin 2023-03-28 129 */
8b654b5034baba0 Hector Martin 2023-03-28 130 if (mbox->hw->has_irq_controls) {
8b654b5034baba0 Hector Martin 2023-03-28 131 writel_relaxed(mbox->hw->irq_bit_send_empty,
8b654b5034baba0 Hector Martin 2023-03-28 132 mbox->regs + mbox->hw->irq_ack);
8b654b5034baba0 Hector Martin 2023-03-28 133 }
8b654b5034baba0 Hector Martin 2023-03-28 134 enable_irq(mbox->irq_send_empty);
8b654b5034baba0 Hector Martin 2023-03-28 135 reinit_completion(&mbox->tx_empty);
8b654b5034baba0 Hector Martin 2023-03-28 136 spin_unlock_irqrestore(&mbox->tx_lock, flags);
8b654b5034baba0 Hector Martin 2023-03-28 137
8b654b5034baba0 Hector Martin 2023-03-28 138 t = wait_for_completion_interruptible_timeout(
8b654b5034baba0 Hector Martin 2023-03-28 139 &mbox->tx_empty,
8b654b5034baba0 Hector Martin 2023-03-28 140 msecs_to_jiffies(APPLE_MBOX_TX_TIMEOUT));
8b654b5034baba0 Hector Martin 2023-03-28 141 if (t < 0)
8b654b5034baba0 Hector Martin 2023-03-28 142 return t;
8b654b5034baba0 Hector Martin 2023-03-28 143 else if (t == 0)
8b654b5034baba0 Hector Martin 2023-03-28 144 return -ETIMEDOUT;
8b654b5034baba0 Hector Martin 2023-03-28 145
8b654b5034baba0 Hector Martin 2023-03-28 146 spin_lock_irqsave(&mbox->tx_lock, flags);
8b654b5034baba0 Hector Martin 2023-03-28 147 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
8b654b5034baba0 Hector Martin 2023-03-28 148 }
8b654b5034baba0 Hector Martin 2023-03-28 149
8b654b5034baba0 Hector Martin 2023-03-28 150 writeq_relaxed(msg.msg0, mbox->regs + mbox->hw->a2i_send0);
8b654b5034baba0 Hector Martin 2023-03-28 @151 writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg.msg1),
8b654b5034baba0 Hector Martin 2023-03-28 152 mbox->regs + mbox->hw->a2i_send1);
8b654b5034baba0 Hector Martin 2023-03-28 153
8b654b5034baba0 Hector Martin 2023-03-28 154 spin_unlock_irqrestore(&mbox->tx_lock, flags);
8b654b5034baba0 Hector Martin 2023-03-28 155
8b654b5034baba0 Hector Martin 2023-03-28 156 return 0;
8b654b5034baba0 Hector Martin 2023-03-28 157 }
8b654b5034baba0 Hector Martin 2023-03-28 158 EXPORT_SYMBOL(apple_mbox_send);
8b654b5034baba0 Hector Martin 2023-03-28 159
8b654b5034baba0 Hector Martin 2023-03-28 160 static irqreturn_t apple_mbox_send_empty_irq(int irq, void *data)
8b654b5034baba0 Hector Martin 2023-03-28 161 {
8b654b5034baba0 Hector Martin 2023-03-28 162 struct apple_mbox *mbox = data;
8b654b5034baba0 Hector Martin 2023-03-28 163
8b654b5034baba0 Hector Martin 2023-03-28 164 /*
8b654b5034baba0 Hector Martin 2023-03-28 165 * We don't need to acknowledge the interrupt at the mailbox level
8b654b5034baba0 Hector Martin 2023-03-28 166 * here even if supported by the hardware. It will keep firing but that
8b654b5034baba0 Hector Martin 2023-03-28 167 * doesn't matter since it's disabled at the main interrupt controller.
8b654b5034baba0 Hector Martin 2023-03-28 168 * apple_mbox_send will acknowledge it before enabling
8b654b5034baba0 Hector Martin 2023-03-28 169 * it at the main controller again.
8b654b5034baba0 Hector Martin 2023-03-28 170 */
8b654b5034baba0 Hector Martin 2023-03-28 171 spin_lock(&mbox->tx_lock);
8b654b5034baba0 Hector Martin 2023-03-28 172 disable_irq_nosync(mbox->irq_send_empty);
8b654b5034baba0 Hector Martin 2023-03-28 173 complete(&mbox->tx_empty);
8b654b5034baba0 Hector Martin 2023-03-28 174 spin_unlock(&mbox->tx_lock);
8b654b5034baba0 Hector Martin 2023-03-28 175
8b654b5034baba0 Hector Martin 2023-03-28 176 return IRQ_HANDLED;
8b654b5034baba0 Hector Martin 2023-03-28 177 }
8b654b5034baba0 Hector Martin 2023-03-28 178
8b654b5034baba0 Hector Martin 2023-03-28 179 static int apple_mbox_poll_locked(struct apple_mbox *mbox)
8b654b5034baba0 Hector Martin 2023-03-28 180 {
8b654b5034baba0 Hector Martin 2023-03-28 181 struct apple_mbox_msg msg;
8b654b5034baba0 Hector Martin 2023-03-28 182 int ret = 0;
8b654b5034baba0 Hector Martin 2023-03-28 183
8b654b5034baba0 Hector Martin 2023-03-28 184 u32 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
8b654b5034baba0 Hector Martin 2023-03-28 185
8b654b5034baba0 Hector Martin 2023-03-28 186 while (!(mbox_ctrl & mbox->hw->control_empty)) {
8b654b5034baba0 Hector Martin 2023-03-28 187 msg.msg0 = readq_relaxed(mbox->regs + mbox->hw->i2a_recv0);
8b654b5034baba0 Hector Martin 2023-03-28 @188 msg.msg1 = FIELD_GET(
8b654b5034baba0 Hector Martin 2023-03-28 189 APPLE_MBOX_MSG1_MSG,
8b654b5034baba0 Hector Martin 2023-03-28 190 readq_relaxed(mbox->regs + mbox->hw->i2a_recv1));
8b654b5034baba0 Hector Martin 2023-03-28 191
8b654b5034baba0 Hector Martin 2023-03-28 192 mbox->rx(mbox, msg, mbox->cookie);
8b654b5034baba0 Hector Martin 2023-03-28 193 ret++;
8b654b5034baba0 Hector Martin 2023-03-28 194 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
8b654b5034baba0 Hector Martin 2023-03-28 195 }
8b654b5034baba0 Hector Martin 2023-03-28 196
8b654b5034baba0 Hector Martin 2023-03-28 197 /*
8b654b5034baba0 Hector Martin 2023-03-28 198 * The interrupt will keep firing even if there are no more messages
8b654b5034baba0 Hector Martin 2023-03-28 199 * unless we also acknowledge it at the mailbox level here.
8b654b5034baba0 Hector Martin 2023-03-28 200 * There's no race if a message comes in between the check in the while
8b654b5034baba0 Hector Martin 2023-03-28 201 * loop above and the ack below: If a new messages arrives inbetween
8b654b5034baba0 Hector Martin 2023-03-28 202 * those two the interrupt will just fire again immediately after the
8b654b5034baba0 Hector Martin 2023-03-28 203 * ack since it's level triggered.
8b654b5034baba0 Hector Martin 2023-03-28 204 */
8b654b5034baba0 Hector Martin 2023-03-28 205 if (mbox->hw->has_irq_controls) {
8b654b5034baba0 Hector Martin 2023-03-28 206 writel_relaxed(mbox->hw->irq_bit_recv_not_empty,
8b654b5034baba0 Hector Martin 2023-03-28 207 mbox->regs + mbox->hw->irq_ack);
8b654b5034baba0 Hector Martin 2023-03-28 208 }
8b654b5034baba0 Hector Martin 2023-03-28 209
8b654b5034baba0 Hector Martin 2023-03-28 210 return ret;
8b654b5034baba0 Hector Martin 2023-03-28 211 }
8b654b5034baba0 Hector Martin 2023-03-28 212
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