[PATCH v4 2/6] KVM: arm64: Save ID registers' sanitized value per guest

[Jing Zhang]

On Tue, Mar 28, 2023 at 12:22 PM Marc Zyngier <maz at kernel.org> wrote:
>
> On Tue, 28 Mar 2023 18:36:58 +0100,
> Jing Zhang <jingzhangos at google.com> wrote:
> >
> > Hi Marc,
>
> [...]
>
> > IIUC, usually we don't need a specific locking to update idregs here.
> > All idregs are 64 bit and can be read/written atomically. The only
> > case that may need a locking is to keep the consistency for PMUVer in
> > AA64DFR0_EL1 and PerfMon in DFR0_EL1. If there is no use case for two
> > VCPU threads in a VM to update PMUVer and PerfMon concurrently, then
> > we don't need the locking as in later patch by using the kvm lock.
> > WDTY?
>
> I think we generally need locking for any writable id-reg, the goal
> being that they will ultimately *all* be writable. As you found out,
> there is this need for the PMU fields, and I'm willing to bet that
> there will be more of those.
>
> And given that the locking you have used in some of the later patches
> violates the locking order (don't worry, you're not alone!), we need
> to use something else. Which is where Oliver's series comes into play.
Got it. Thanks for the details. I'll add locking based on Oliver's series.
>
> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.
Thanks,
Jing