[PATCH V3 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain

[Nishanth Menon]

On 16:48-20230328, Vaishnav Achath wrote:
> Hi Sinthu,
> 
> On 16/03/23 17:11, Sinthu Raja wrote:
> > From: Sinthu Raja <sinthu.raja at ti.com>
> > 
> > The size of wkup domain I/O PADCONFIG register set is incorrect for J721S2.
> > Therefore, update the PADCONFIG total offset size to the correct value for
> > J721S22 SoC.
> > 
> > Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
> > Signed-off-by: Sinthu Raja <sinthu.raja at ti.com>
> > ---
> > 
> > Changes in V3:
> > - Added Fix tag
> > 
> > Changes in V2:
> > - Update commit description.
> > - Update the offset value to 0x194 because 0x190 is the last register of the
> >   IO PADCONFIG register set.
> > 
> 
> The existing PADCONFIG register region descriptions in the pinctrl nodes seems
> to be incorrect for j721s2-main and j721s2-mcu-wakeup due to non-addressable
> holes in the region which causes bus aborts when the registers are read and
> causes system crash if we read something like,
> /sys/kernel/debug/pinctrl/4301c000.pinctrl-pinctrl-single/pins
> 
> This is what I saw from inspection of the datasheet:
> 
> * WKUP_PADCONFIG13, WKUP_PADCONFIG25 missing in WKUP_PADCONFIG region
> * MAIN_PADCONFIG 64-68 missing in MAIN_PADCONFIG region
> 
> I have verified that your patch does not introduce new issues, but since it is a
> Fix patch, I will defer the decision to the maintainers on whether we should
> split the nodes to avoid non-addressable regions and fix it completely here or
> later do a fix for the split.

Do a single fix-up please.

-- 
Regards,
Nishanth Menon
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