[PATCH v5 0/2] Introduce ICSSG based ethernet Driver

[Christian Gmeiner]

Hi

Am Fr., 10. Feb. 2023 um 13:02 Uhr schrieb MD Danish Anwar <danishanwar at ti.com>:
>
> The Programmable Real-time Unit and Industrial Communication Subsystem
> Gigabit (PRU_ICSSG) is a low-latency microcontroller subsystem in the TI
> SoCs. This subsystem is provided for the use cases like the implementation
> of custom peripheral interfaces, offloading of tasks from the other
> processor cores of the SoC, etc.
>
> The subsystem includes many accelerators for data processing like
> multiplier and multiplier-accumulator. It also has peripherals like
> UART, MII/RGMII, MDIO, etc. Every ICSSG core includes two 32-bit
> load/store RISC CPU cores called PRUs.
>
> The above features allow it to be used for implementing custom firmware
> based peripherals like ethernet.
>
> This series adds the YAML documentation and the driver with basic EMAC
> support for TI AM654 Silicon Rev 2 SoC with the PRU_ICSSG Sub-system.
> running dual-EMAC firmware.
> This currently supports basic EMAC with 1Gbps and 100Mbps link. 10M and
> half-duplex modes are not yet supported because they require the support
> of an IEP, which will be added later.
> Advanced features like switch-dev and timestamping will be added later.

What are TI plans to support TI AM642 Silicon Rev 2?

-- 
greets
--
Christian Gmeiner, MSc

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