[PATCH 1/2] arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB

[Nishanth Menon]

Hi Vignesh Raghavendra,

On Mon, 20 Mar 2023 10:19:34 +0530, Vignesh Raghavendra wrote:
> Per AM62x SoC datasheet[0] L2 cache is 512KB.
> 
> [0] https://www.ti.com/lit/gpn/am625 Page 1.
> 
> 

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/2] arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB
      commit: 6974371cab1c488a53960945cb139b20ebb5f16b
[2/2] arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
      commit: 438b8dc949bf45979c32553e96086ff1c6e2504e

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

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and review of the tree, please engage with people reporting problems and
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[1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
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