[PATCH v2 1/4] dts: add riscv include prefix link
Andre Przywara
andre.przywara at arm.com
Sun Mar 19 17:52:46 PDT 2023
The Allwinner D1/D1s SoCs (with a RISC-V core) use an (almost?) identical
die as their R528/T113-s siblings with ARM Cortex-A7 cores.
To allow sharing the basic SoC .dtsi files across those two
architectures as well, introduce a symlink to the RISC-V DT directory.
Signed-off-by: Andre Przywara <andre.przywara at arm.com>
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
Acked-by: Palmer Dabbelt <palmer at rivosinc.com>
---
scripts/dtc/include-prefixes/riscv | 1 +
1 file changed, 1 insertion(+)
create mode 120000 scripts/dtc/include-prefixes/riscv
diff --git a/scripts/dtc/include-prefixes/riscv b/scripts/dtc/include-prefixes/riscv
new file mode 120000
index 0000000000000..2025094189380
--- /dev/null
+++ b/scripts/dtc/include-prefixes/riscv
@@ -0,0 +1 @@
+../../../arch/riscv/boot/dts
\ No newline at end of file
--
2.35.7
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