[PATCH 4/5] arm64: dts: rockchip: fix gmac support for NanoPi R5S
Tianling Shen
cnsztl at gmail.com
Wed Mar 15 09:02:27 PDT 2023
- Changed phy-mode to rgmii.
- Fixed pull type in pinctrl for gmac0.
- Removed duplicate properties in mdio node.
These properties are defined in the gmac0 node already.
Signed-off-by: Tianling Shen <cnsztl at gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
index e9adf5e66529..2a1118f15c29 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
@@ -57,7 +57,7 @@
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
- phy-mode = "rgmii-id";
+ phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
@@ -79,9 +79,6 @@
reg = <1>;
pinctrl-0 = <ð_phy0_reset_pin>;
pinctrl-names = "default";
- reset-assert-us = <10000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
};
};
@@ -115,7 +112,7 @@
&pinctrl {
gmac0 {
eth_phy0_reset_pin: eth-phy0-reset-pin {
- rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
--
2.17.1
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