[PATCH v3 5/6] KVM: arm64: Introduce ID register specific descriptor
Jing Zhang
jingzhangos at google.com
Mon Mar 13 21:26:19 PDT 2023
Hi Reiji,
On Sun, Mar 12, 2023 at 9:15 PM Reiji Watanabe <reijiw at google.com> wrote:
>
> Hi Jing,
>
> On Mon, Feb 27, 2023 at 10:23 PM Jing Zhang <jingzhangos at google.com> wrote:
> >
> > Introduce an ID feature register specific descriptor to include ID
> > register specific fields and callbacks besides its corresponding
> > general system register descriptor.
> > New fields for ID register descriptor would be added later when it
> > is necessary to support a writable ID register.
> >
> > No functional change intended.
> >
> > Co-developed-by: Reiji Watanabe <reijiw at google.com>
> > Signed-off-by: Reiji Watanabe <reijiw at google.com>
> > Signed-off-by: Jing Zhang <jingzhangos at google.com>
> > ---
> > arch/arm64/kvm/id_regs.c | 184 ++++++++++++++++++++++++++++----------
> > arch/arm64/kvm/sys_regs.c | 2 +-
> > arch/arm64/kvm/sys_regs.h | 1 +
> > 3 files changed, 138 insertions(+), 49 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/id_regs.c b/arch/arm64/kvm/id_regs.c
> > index 21ec8fc10d79..fc0dcd557cbb 100644
> > --- a/arch/arm64/kvm/id_regs.c
> > +++ b/arch/arm64/kvm/id_regs.c
> > @@ -18,6 +18,10 @@
> >
> > #include "sys_regs.h"
> >
> > +struct id_reg_desc {
> > + const struct sys_reg_desc reg_desc;
> > +};
> > +
> > static u8 vcpu_pmuver(const struct kvm_vcpu *vcpu)
> > {
> > if (kvm_vcpu_has_pmu(vcpu))
> > @@ -326,21 +330,25 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
> > }
> >
> > /* sys_reg_desc initialiser for known cpufeature ID registers */
> > -#define ID_SANITISED(name) { \
> > - SYS_DESC(SYS_##name), \
> > - .access = access_id_reg, \
> > - .get_user = get_id_reg, \
> > - .set_user = set_id_reg, \
> > - .visibility = id_visibility, \
> > +#define ID_SANITISED(name) { \
> > + .reg_desc = { \
> > + SYS_DESC(SYS_##name), \
> > + .access = access_id_reg, \
> > + .get_user = get_id_reg, \
> > + .set_user = set_id_reg, \
> > + .visibility = id_visibility, \
> > + }, \
> > }
> >
> > /* sys_reg_desc initialiser for known cpufeature ID registers */
> > -#define AA32_ID_SANITISED(name) { \
> > - SYS_DESC(SYS_##name), \
> > - .access = access_id_reg, \
> > - .get_user = get_id_reg, \
> > - .set_user = set_id_reg, \
> > - .visibility = aa32_id_visibility, \
> > +#define AA32_ID_SANITISED(name) { \
> > + .reg_desc = { \
> > + SYS_DESC(SYS_##name), \
> > + .access = access_id_reg, \
> > + .get_user = get_id_reg, \
> > + .set_user = set_id_reg, \
> > + .visibility = aa32_id_visibility, \
> > + }, \
> > }
> >
> > /*
> > @@ -348,12 +356,14 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
> > * register with encoding Op0=3, Op1=0, CRn=0, CRm=crm, Op2=op2
> > * (1 <= crm < 8, 0 <= Op2 < 8).
> > */
> > -#define ID_UNALLOCATED(crm, op2) { \
> > - Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
> > - .access = access_id_reg, \
> > - .get_user = get_id_reg, \
> > - .set_user = set_id_reg, \
> > - .visibility = raz_visibility \
> > +#define ID_UNALLOCATED(crm, op2) { \
> > + .reg_desc = { \
> > + Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
> > + .access = access_id_reg, \
> > + .get_user = get_id_reg, \
> > + .set_user = set_id_reg, \
> > + .visibility = raz_visibility \
> > + }, \
> > }
> >
> > /*
> > @@ -361,15 +371,17 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
> > * For now, these are exposed just like unallocated ID regs: they appear
> > * RAZ for the guest.
> > */
> > -#define ID_HIDDEN(name) { \
> > - SYS_DESC(SYS_##name), \
> > - .access = access_id_reg, \
> > - .get_user = get_id_reg, \
> > - .set_user = set_id_reg, \
> > - .visibility = raz_visibility, \
> > +#define ID_HIDDEN(name) { \
> > + .reg_desc = { \
> > + SYS_DESC(SYS_##name), \
> > + .access = access_id_reg, \
> > + .get_user = get_id_reg, \
> > + .set_user = set_id_reg, \
> > + .visibility = raz_visibility, \
> > + }, \
> > }
> >
> > -static const struct sys_reg_desc id_reg_descs[] = {
> > +static const struct id_reg_desc id_reg_descs[KVM_ARM_ID_REG_NUM] = {
> > /*
> > * ID regs: all ID_SANITISED() entries here must have corresponding
> > * entries in arm64_ftr_regs[].
> > @@ -379,9 +391,13 @@ static const struct sys_reg_desc id_reg_descs[] = {
> > /* CRm=1 */
> > AA32_ID_SANITISED(ID_PFR0_EL1),
> > AA32_ID_SANITISED(ID_PFR1_EL1),
> > - { SYS_DESC(SYS_ID_DFR0_EL1), .access = access_id_reg,
> > - .get_user = get_id_reg, .set_user = set_id_dfr0_el1,
> > - .visibility = aa32_id_visibility, },
> > + { .reg_desc = {
> > + SYS_DESC(SYS_ID_DFR0_EL1),
> > + .access = access_id_reg,
> > + .get_user = get_id_reg,
> > + .set_user = set_id_dfr0_el1,
> > + .visibility = aa32_id_visibility, },
> > + },
> > ID_HIDDEN(ID_AFR0_EL1),
> > AA32_ID_SANITISED(ID_MMFR0_EL1),
> > AA32_ID_SANITISED(ID_MMFR1_EL1),
> > @@ -410,8 +426,12 @@ static const struct sys_reg_desc id_reg_descs[] = {
> >
> > /* AArch64 ID registers */
> > /* CRm=4 */
> > - { SYS_DESC(SYS_ID_AA64PFR0_EL1), .access = access_id_reg,
> > - .get_user = get_id_reg, .set_user = set_id_aa64pfr0_el1, },
> > + { .reg_desc = {
> > + SYS_DESC(SYS_ID_AA64PFR0_EL1),
> > + .access = access_id_reg,
> > + .get_user = get_id_reg,
> > + .set_user = set_id_aa64pfr0_el1, },
> > + },
> > ID_SANITISED(ID_AA64PFR1_EL1),
> > ID_UNALLOCATED(4, 2),
> > ID_UNALLOCATED(4, 3),
> > @@ -421,8 +441,12 @@ static const struct sys_reg_desc id_reg_descs[] = {
> > ID_UNALLOCATED(4, 7),
> >
> > /* CRm=5 */
> > - { SYS_DESC(SYS_ID_AA64DFR0_EL1), .access = access_id_reg,
> > - .get_user = get_id_reg, .set_user = set_id_aa64dfr0_el1, },
> > + { .reg_desc = {
> > + SYS_DESC(SYS_ID_AA64DFR0_EL1),
> > + .access = access_id_reg,
> > + .get_user = get_id_reg,
> > + .set_user = set_id_aa64dfr0_el1, },
> > + },
> > ID_SANITISED(ID_AA64DFR1_EL1),
> > ID_UNALLOCATED(5, 2),
> > ID_UNALLOCATED(5, 3),
> > @@ -461,12 +485,12 @@ static const struct sys_reg_desc id_reg_descs[] = {
> > */
> > int emulate_id_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *params)
> > {
> > - const struct sys_reg_desc *r;
> > + u32 id;
> >
> > - r = find_reg(params, id_reg_descs, ARRAY_SIZE(id_reg_descs));
> > + id = reg_to_encoding(params);
> >
> > - if (likely(r)) {
> > - perform_access(vcpu, params, r);
> > + if (likely(is_id_reg(id))) {
> > + perform_access(vcpu, params, &id_reg_descs[IDREG_IDX(id)].reg_desc);
> > } else {
> > print_sys_reg_msg(params,
> > "Unsupported guest id_reg access at: %lx [%08lx]\n",
> > @@ -483,38 +507,102 @@ void kvm_arm_reset_id_regs(struct kvm_vcpu *vcpu)
> > unsigned long i;
> >
> > for (i = 0; i < ARRAY_SIZE(id_reg_descs); i++)
> > - if (id_reg_descs[i].reset)
> > - id_reg_descs[i].reset(vcpu, &id_reg_descs[i]);
> > + if (id_reg_descs[i].reg_desc.reset)
> > + id_reg_descs[i].reg_desc.reset(vcpu, &id_reg_descs[i].reg_desc);
> > }
> >
> > int kvm_arm_get_id_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
> > {
> > - return kvm_sys_reg_get_user(vcpu, reg,
> > - id_reg_descs, ARRAY_SIZE(id_reg_descs));
> > + u64 __user *uaddr = (u64 __user *)(unsigned long)reg->addr;
> > + const struct sys_reg_desc *r;
> > + struct sys_reg_params params;
> > + u64 val;
> > + int ret;
> > + u32 id;
> > +
> > + if (!index_to_params(reg->id, ¶ms))
> > + return -ENOENT;
> > + id = reg_to_encoding(¶ms);
> > +
> > + if (!is_id_reg(id))
> > + return -ENOENT;
> > +
> > + r = &id_reg_descs[IDREG_IDX(id)].reg_desc;
> > + if (r->get_user) {
> > + ret = (r->get_user)(vcpu, r, &val);
> > + } else {
> > + ret = 0;
> > + val = IDREG(vcpu->kvm, id);
> > + }
> > +
> > + if (!ret)
> > + ret = put_user(val, uaddr);
> > +
> > + return ret;
> > }
> >
> > int kvm_arm_set_id_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
> > {
> > - return kvm_sys_reg_set_user(vcpu, reg,
> > - id_reg_descs, ARRAY_SIZE(id_reg_descs));
> > + u64 __user *uaddr = (u64 __user *)(unsigned long)reg->addr;
> > + const struct sys_reg_desc *r;
> > + struct sys_reg_params params;
> > + u64 val;
> > + int ret;
> > + u32 id;
> > +
> > + if (!index_to_params(reg->id, ¶ms))
> > + return -ENOENT;
> > + id = reg_to_encoding(¶ms);
> > +
> > + if (!is_id_reg(id))
> > + return -ENOENT;
> > +
> > + if (get_user(val, uaddr))
> > + return -EFAULT;
> > +
> > + r = &id_reg_descs[IDREG_IDX(id)].reg_desc;
> > +
> > + if (sysreg_user_write_ignore(vcpu, r))
> > + return 0;
> > +
> > + if (r->set_user) {
> > + ret = (r->set_user)(vcpu, r, val);
> > + } else {
> > + WARN_ONCE(1, "ID register set_user callback is NULL\n");
> > + ret = 0;
> > + }
> > +
> > + return ret;
> > }
> >
> > bool kvm_arm_check_idreg_table(void)
> > {
> > - return check_sysreg_table(id_reg_descs, ARRAY_SIZE(id_reg_descs), false);
> > + unsigned int i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(id_reg_descs); i++) {
> > + const struct sys_reg_desc *r = &id_reg_descs[i].reg_desc;
> > +
> > + if (IDREG_IDX(reg_to_encoding(r)) != i) {
>
> As I mentioned for the previous version of the patch,
> can we also check if this is an ID register ?
Sure, will use is_id_reg() to do the checking.
>
> > + kvm_err("id_reg table %pS entry %d not set correctly\n",
> > + &id_reg_descs[i].reg_desc, i);
> > + return false;
> > + }
> > + }
> > +
> > + return true;
> > }
> >
> > int kvm_arm_walk_id_regs(struct kvm_vcpu *vcpu, u64 __user *uind)
> > {
> > - const struct sys_reg_desc *i2, *end2;
> > + const struct id_reg_desc *i2, *end2;
> > unsigned int total = 0;
> > int err;
> >
> > i2 = id_reg_descs;
> > end2 = id_reg_descs + ARRAY_SIZE(id_reg_descs);
> >
> > - while (i2 != end2) {
> > - err = walk_one_sys_reg(vcpu, i2++, &uind, &total);
> > + for (; i2 != end2; i2++) {
> > + err = walk_one_sys_reg(vcpu, &(i2->reg_desc), &uind, &total);
> > if (err)
> > return err;
> > }
> > @@ -532,12 +620,12 @@ void kvm_arm_set_default_id_regs(struct kvm *kvm)
> > u64 val;
> >
> > for (i = 0; i < ARRAY_SIZE(id_reg_descs); i++) {
> > - id = reg_to_encoding(&id_reg_descs[i]);
> > + id = reg_to_encoding(&id_reg_descs[i].reg_desc);
> > if (WARN_ON_ONCE(!is_id_reg(id)))
>
> If kvm_arm_check_idreg_table() checks all entries in the table
> are an ID register, we can remove this checking from here.
Agreed.
>
> Thank you,
> Reiji
>
>
> > /* Shouldn't happen */
> > continue;
> >
> > - if (id_reg_descs[i].visibility == raz_visibility)
> > + if (id_reg_descs[i].reg_desc.visibility == raz_visibility)
> > /* Hidden or reserved ID register */
> > continue;
> >
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 568ebc0fb15c..7b63d9038639 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -2519,7 +2519,7 @@ int kvm_handle_sys_reg(struct kvm_vcpu *vcpu)
> > * Userspace API
> > *****************************************************************************/
> >
> > -static bool index_to_params(u64 id, struct sys_reg_params *params)
> > +bool index_to_params(u64 id, struct sys_reg_params *params)
> > {
> > switch (id & KVM_REG_SIZE_MASK) {
> > case KVM_REG_SIZE_U64:
> > diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
> > index 9231d89889c7..094a7f19d93f 100644
> > --- a/arch/arm64/kvm/sys_regs.h
> > +++ b/arch/arm64/kvm/sys_regs.h
> > @@ -239,6 +239,7 @@ static inline bool is_id_reg(u32 id)
> >
> > void perform_access(struct kvm_vcpu *vcpu, struct sys_reg_params *params,
> > const struct sys_reg_desc *r);
> > +bool index_to_params(u64 id, struct sys_reg_params *params);
> > const struct sys_reg_desc *get_reg_by_id(u64 id,
> > const struct sys_reg_desc table[],
> > unsigned int num);
> > --
> > 2.39.2.722.g9855ee24e9-goog
> >
Thanks,
Jing
More information about the linux-arm-kernel
mailing list